交通灯实验报告.docx

交通灯课程设计实验报告专 业： 班 级： 姓 名： 学 号： 指导老师： 一、 课程设计目的：1、 要求掌握电子设计自动化（EDA）的基本方法和相关软件的操作。2、 通过学习能进行图形设计和VHDL/Verilog设计。二、 课程设计题目及要求：设计题目：十字路口交通灯信号控制器设计（主干道，支干道，红黄绿灯）。 题目要求：为一条主干道和一条支干道汇合成的十字路口设计一个交通信号灯控制器。主干道处于常允许通行的状态，支干道有车来时才允许支干道通行。主、支干道均有车时，两者交替允许通行。 在每次由绿灯亮到红灯亮的转换过程中，要亮黄灯作为过渡。 三、 课程设计设备：FPGA实验箱、quartus四、 课程设计思路及方案：根据题目要求，在支干道没有车时间主干道出于长允许通行状态，在支干道有车时间两者交替允许通车，这样可以在支干道没车时间让主干道的绿灯在某个时间停下，同样此时支干道出于红灯状态，支干道有车则变换为主干道红灯，支干道绿灯。在两者交替通车的状态下，通过计时来改变路口红绿灯的状态，设计黄灯统一为3s。在此只给出各种情况之间的转换如下：如果支干道有车则转换到左图，支干道没车则转换到右图。支干道有车 支干道无车3s10s3s27s 状态转换图：顶层原理图：五、 实验心得：通过这次课程设计让我对Verilog有了更深层次的认识，也认识到了学习这门语言的重要性。在实验过程中遇到了一些问题，在老师的帮助下最终得到了解决，例如考虑问题不够细致，在支干道无车的情况下转换到支干道有车主干道绿灯直接变为绿灯，此处应该留有一定的缓冲时间。此外也让我对quartus软件的使用更加熟练，让我知道了要想学好写代码就要多去写的道理，相信通过多动手多思考一定可以熟练的掌握这门语言六、 源程序代码：Module traffic_lights (clk,reset,b_car,lamp_b,lamp_m,led_b1,led_b2,led_m1,led_m2); input clk,reset,b_car; /输入 output3:0 led_b1,led_b2,led_m1,led_m2; /数码管控制信号输出 output2:0 lamp_b,lamp_m; parameter gb_t=8b00010000, y_t=8b00000011, rb_t=8b00110000, gm_t=8b00100111, rm_t=8b00010011; /各灯时间 parameter s1=4b0001, s2=4b0010, s3=4b0100, s4=4b1000;/状态 reg2:0 lamp_b,lamp_m; /支路口和祝路口的LED控制信号 reg T0,T1,T2; reg over; reg stop; reg3:0 state; reg7:0 num_b,num_m; reg3:0 led_b1,led_b2,led_m1,led_m2; always (posedge clk or negedge reset) begin if(!reset) begin state = s1; lamp_b = 3b001; lamp_m = 3b100; num_b = rb_t; num_m = gm_t; over = 1; T0 = 0; T1 = 0; T2 = 0; stop = 1; end/复位 else begin if(!over) begin over = 1; case(state) s1: if(T0=1&b_car=1) begin state = s2; lamp_b =3b001; lamp_m =3b010; num_m =y_t; num_b =num_b-1; T0 = 0; stop =1; end else begin state = s1; lamp_b =3b001; lamp_m =3b100; stop =0; end s2: if (T1=1) begin state =s3; lamp_b =3b100; lamp_m =3b001; num_b =gb_t; num_m =rm_t; T1 =0; end else begin state =s2; end s3: if(T2=1) begin state =s4; lamp_b =3b010; lamp_m =3b001; num_b =y_t; num_m =num_m-1; T2 =0; end else state =s3; s4: if(T1=1) begin state =s1; lamp_b =3b001; lamp_m =3b100; num_b =rb_t; num_m =gm_t; T1=0; end else state =s4 ; default: state =s1; endcaseendelse begin if (stop) begin begin if(state=s3&b_car=0) begin state =s4; lamp_b =3b010; lamp_m =3b001; num_b =y_t; num_m =y_t; T2 1) if(num_b3:0=0) begin num_b3:0 =4b1001; num_b7:4 =num_b7:4-1; end else num_b3:0 1) if(num_m3:0=0) begin num_m3:0=4b1001; num_m7:4 =num_m7:4-1; end else num_m3:0 =num_m3:0-1; if (num_b=2|num_m=2) begin over =0; if(state=s1) begin T0 =1; end if(state=s2) begin T1 =1; end if(state=s3) begin T2 =1; end if(state=s4) begin T1 =1; end end end if (state=s3&b_car=0) begin state =s4; lamp_b =3b010; lamp_m =3b011; num_b =y_t; num_m =y_t; T2 =0; end end else begin if(!b_car) begin num_b =num_b; num_m =num_m; end else begin state =s3; lamp_b =3b100; lamp_m =3b001; num_b =gb_t; num_m =rm_t; T1 =0; stop =1; end end end end end always (posedge clk or negedge reset) begin case(num_b3:0) 0:led_b1 =4b0000; 1:led_b1 =4b0001; 2:led_b1 =4b0010; 3:led_b1 =4b0011; 4:led_b1 =4b0100; 5:led_b1 =4b0101; 6:led_b1 =4b0110; 7:led_b1 =4b0111; 8:led_b1 =4b1000; 9:led_b1 =4b1001; default: led_b1 =4b0000; endcase case(num_b7:4) 0:led_b2 =4b0000; 1:led_b2 =4b0001; 2:led_b2 =4b0010; 3:led_b2 =4b0011; 4:led_b2 =4b0100; 5:led_b2 =4b0101; 6:led_b2 =4b0110; 7:led_b2 =4b0111; 8:led_b2 =4b1000; 9:led_b2 =4b1001; default: led_b2 =4b0000; endcase case(num_m3:0) 0:led_m1 =4b0000; 1:led_m1 =4b0001; 2:led_m1 =4b0010; 3:led_m1 =4b0011; 4:led_m1 =4b0100; 5:led_m1 =4b0101; 6:led_m1 =4b0110; 7:led_m1 =4b0111; 8:led_m1 =4b1000; 9:led_m1 =4b1001; default: led_m1 =4b0000; endcase case(num_m7:4) 0:led_m2 =4b0000; 1:led_m2 =4b0001; 2:l