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基于
单片机
车辆
检测器
设计
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基于单片机车辆检测器的设计,基于,单片机,车辆,检测器,设计
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英 文 翻 译系 别 自动化系 专 业 自动化 班 级 191003 学生姓名 文武浪 学 号 103649 指导教师 王卫军 The principle of toroidal coil detection Toroidal coil length is 2 m, width depends on the lane width, usually covering a lane of 50% 60%, should not be less than 0.5 m. Know by electromagnetic field theory, any current-carrying conductor will be produced in the surrounding magnetic field, for the length of l type, number of turns for the N of solenoid coil, coil in the magnetic field strength. The self inductance is: L = LSL0N2Al (1)Type: the relative permeability of LS is medium, air LS to 1; L0 = 4 x 10-7 hm - 1; A. to coil around the area. Because of toroidal coil can not completely equal to solenoid, considering the nonuniform1.Design principle and the hardware of the systemThe system design principle and hardware system design principle as shown in figure 1. Toroidal coil through feeder connection to the isolation transformer, on the other side of the isolation transformer and a capacitance in parallel, LC parallel resonance of this LC parallel resonant frequency can be obtained according to the formula (1) 1. F = 12 PLC (1) : L) for the circular coil and the total inductance of feeder; C) for parallel capacitor; F) as the resonance frequency. Can be seen by the formula, the factors influencing the frequency f only L and C, so in certain cases, C ring coil and the total inductance of feeder determines the frequency of oscillation. The numerical values of similar products at home and abroad for reference, at the same time, to determine the vehicle detector coil oscillation frequency is between 20 100 KHZ range. Circular coil inductance is 80 120 lh, feeder inductance for 019 H# m - 1, plus the influence of other factors, the length of the feeder in within 300 m, in order to make the total inductance is less than 1 000 lh. Isolation transformer primary coil and secondary coil number of turns for the 1 b1, it makes the total inductance coil and feeder truthfully from primary reflection to the secondary, isolation effect, prevent damage of external interference of the internal circuit.Diagram 1.the system principle design of schematic diagram In the design of the phase-locked loop circuit composed of MM74HC4046M role is to provide a current source for LC oscillation, its frequency locking range between 20 to 100 kHz. Phase-locked loop is mainly composed of the phase comparator, voltage-controlled oscillator, low pass filter of 3 parts, its basic structure as shown in figure 2. Follow the LC oscillator frequency oscillation frequency and the frequency to the EPLD. The phase comparator is a signal control delay of digital storage network. Its claim to the input signal duty cycleIs not high, allowed to enter asymmetric waveform, it has wide capture range, and wont lock in the harmonics of the input signal. It provides digital error signal and the signal (impulse) phase locking 2 kind of loseOut, when to lock in the phase comparator keep zero phase shift between two input signals. MM74HC4046M part design of the circuit shown in figure 3.Diagram 3.the peripheral circuit design 14 feet LC oscillation signal, four feet to the output of the vco. The phase-locked loop circuit adopts the voltage-controlled oscillator is RC type, must be an external capacitor C1 (6, 7 feet) and the resistor R4 (11 feet) as a charge and discharge device. When the phase lock loop (PLL) to track the frequency width of input signal requirement need external resistor R3 (12 feet). Because of the VCO is a current controlled oscillator, charging current of timing capacitor C1 and from 9 feet is directly proportional to the control voltage of the input, the oscillation frequency of the VCO is proportional to the voltage control. When the VCO control voltage is zero, the output frequency of the lowest; When the VDD input control voltage is equal to the power supply voltage, output frequency increases linearly to the highest output frequency. VCO oscillating frequency range is determined by the R3 and R4 and C1. Because of its charging and discharging are performed by the same capacitor C1, therefore, the output waveform is symmetrical square wave. R4 determines the maximum oscillation frequency of the VCO, R3 determines the minimum oscillation frequency of the VCO 3. This can be designed to test the four-way signal, composed of XC9536XL - 7 vq44c EPLD circuit can into the CK1 CK4 is 4 line circle oscillation frequency input, SEL signals for choice, to choose the input coil. T0 for 1 and 3 coil oscillation frequency input, T1 for # 2 and # 4 coil oscillation frequency input. Serial communication using RS - 485 standard, it USES the difference balance data transmission, the common mode signal has excellent inhibition ability, not only long transmission distance, reliable communication, and use a single + 5 v or + 3 v power supply, logic level compatible with the traditional digital logic TTL 5. This design USES MAX488EESA chip, using the + 5 v power supply full duplex mode, the highest rate of up to 0125 MBPS. MAX488EESA with SST89C58 interface circuit as shown in figure 5. Vehicle inspection plate using 12 V power supply, through 7805 into 5 V voltage for the use of single-chip microcomputer and oscillation circuit, and convert 5 V to 313 V for the use of EPLD. And suppress the high frequency interference in power supply and ground magnetic beads, and USES the capacitor filter, the digital earth and simulated with the method of one-point earthing, and in 7805 the output increase tablets filter part of single-chip processor, restrain oscillation of crosstalk of single chip microcomputer.Diagram 4.serial line circuit2.The coupling oscillation circuitCoupling oscillation circuit using the three-point capacitance feedback oscillation circuit, as shown in figure 2. Two reverse connection diagram, the regulator tube suppress sinusoidal oscillation output signal in the range of 5 + 5 v, the former vice edge coupling transformer turn ratio is 1:1, diode P6KE12CA is used to eliminate the moment caused by the electrostatic voltage. Sinusoidal oscillation signal into the signal after a comparator LM339 plastic shaping and amplifying circuit, and then output to the counting unit of the microprocessor. According to the actual need, can increase the channel multiplex detection, draw only one here.环形线圈检测原理环形线圈长为2m,宽度视车道宽度而定,通常是覆盖一个车道的50%60%,不应小于0.5m。由电磁场理论知道,任何载流导线都将在其周围产生磁场,对于长度为l、匝数为N的螺线管型线圈,线圈内磁场强度均匀。其自感量为:L=LSL0N2Al(1)式中:LS是介质的相对磁导率,空气的LS为1;L0=410-7hm-1;A为线圈的环绕面积。由于环形线圈不能完全等同于螺线管,考虑引入磁场的不均匀修正因子F1,于是环形线圈的自感量L可表示为:L=F1LSL0N2Al(2)由式(2)可知,环形线圈的自感的大小取决于线圈的周长、环绕面积、匝数及周围的介质情况。当有车辆通过环形线圈时,车体上的铁金属底板产生自成闭合回路的感应电涡流,此涡流又产生与原有磁场相反的新磁场,导致线圈总电感量变小,使调谐频率偏离原有数值。该频率偏离信号经波形整形为矩形波后作为计数脉冲,在固定的时间窗口采样计数脉冲便可间接得到探测振荡器的频率的变化。如果将无车辆通过时的空载频率用f0表示(频率本底),将有车辆通过时的实载频率用fx表示,差值为$f=fx-f0,对应的脉冲计数差值为$。由于道路(路面变形等)、气环境的变化和线圈老化以及变形等干扰因素的影响均会使空载频率f0发生漂移,故每10min需对f0动作漂移补偿,重新标定一次f0。1.系统设计的原理及硬件系统系统的设计原理及硬件系统设计原理见图1。环形线圈通过馈线连接到隔离变压器一端,隔离变压器的另一端与一个电容并联,组成LC并联谐振, 此LC并联谐振的频率可根据公式(1)求得1。f=12PLC(1)式中:L)为环形线圈与馈线的总电感量;C)为并联的电容;f)为谐振频率。由公式可以看出,影响频率f的因素只有L和C,故在C一定的情况下,环形线圈与馈线的总电感量决定了振荡频率。同时借鉴国内外同类产品的相关数值,确定车辆检测器线圈的振荡频率在20100kHz范围之间。环形线圈的电感量为80120LH,馈线的电感量为019 H#m-1,加上其它因素的影响,馈线的长度设在300 m以内,以使总电感量小于1 000LH。隔离变压器初级线圈与次级线圈匝数之比为1B1,它使线圈和馈线的总电感量如实的从初级反映到次级,起隔离的作用,防止外界的干扰损坏内部电路。 图1 硬件系统设计原理图 本设计中由MM74HC4046M组成的锁相环电路的作用是为LC振荡提供电流源,其频率锁定范围在20 100 kHz之间。锁相环主要由相位比较器、压控振荡器、低通滤波器3部分组成,它的基本构成见图2。 振荡器频率跟随LC振荡频率,并将此频率送到EPLD。相位比较器是一个由信号的上升沿控制的数字存储网络。它对输入信号占空比的要求不高,允许输入非对称波形,它具有很宽的捕捉频率范围,而且不会锁定在输入信号的谐波。它提供数字误差信号和锁定信号(相位脉冲)2种输出,当达到锁定时,在相位比较器的2个输人信号之间保持零度相移。MM74HC4046M的部分设计电路见图3。图3 MM74HC4046M的外围设计电路其中14脚接LC振荡信号,4脚为压控振荡器的输出端。本电路锁相环采用的是RC型压控振荡器,必须外接电容C1(6,7脚)和电阻R4(11脚)作为充放电元件。当锁相环(PLL)对跟
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