单片机外文翻译课案

1、中原工学院信息商务学院外文翻译51系列单片机的结构和功能51系列单片机是英特尔公司生产的具有一定结构和功能的单片机产品。这家公司在1976年引入8位MCS - 48系列单片机后，于1980年又推出了 8位高档的MCS 51系列 单片机。它包含很多种这类型的单片机，如 8051，8031, 8751，80C51BH 80C31BH等， 它们的基本组成，基本性能和指令系统都是一样的。一般情况习惯用 8051来代表51系 列单片机。一个单片机的系统是由以下几部分组成：（1）一个8位CPU微处理器。（2）静态随 机存取存储器，能够储存程序运行过程中产生的数据。（3）程序存储器ROM / EPROMS（

2、4KB/8KB，用来保存程序和一些初始数据。但是在一些单片机中不使用ROM / EPROM中，女口 8031，8032，80C51系列等。（4）4个8排的I / O 并行接口 P0 P3,每个口可 以用作输入，也可以用作输出。（5）2个定时器/计数器，每个定时器/计数器可设置计数 用来计数外部事件，可以设置成常用的定时方式，并可以根据计算或结果控制单片机的 运行。（6）五个中断源控制系统。（7）1个双向串行I / O口的UART（通用异步接收器/ 发送器UART，用于实现单片机的串行通信。（8）振荡器和时钟产生电路，需要外部电源 的石英晶体微调电路，允许接在12MHZ勺振荡频率上。上述部分通过

3、内部数据总线连接。 其中，CPU是单片机的核心，它是单片机的控制和指挥中心，ALU算数逻辑运算单元可进行算术运算和逻辑运算，由1个8暂时存储器，和2个8位的累加器组成。ACCS加器 是ALU运算结果的存放单元，一般数据通过它来传送。此外，ACC往往被视为对8051内的数据传输中转站。和通常的微处理器一样，它是最繁忙的寄存器。有记忆功能并执行 命令。该控制器包括程序计数器，可读写的存储器，振荡器和定时电路等。该程序计数 器是有两对8或16位计数器，它是一个字节地址计数器，在个人电脑运行程序时，执行 下一个单元的内容，程序执行时可以改变它的内容从而改变运行的结果。在8051芯片振荡电路中，需要外接

4、石英晶体和微调电容，其频率范围为1.2MHz-12MHz该脉冲信号，即为8051的工作周期，是最小的时间单位。8051和其他单片机一样，都有相同的控制和 功能，就像一个乐队跟从拍子指挥一样。在8051中有RO（程序存储器，只能读取），和RAM（数据存储器，可以读和写）， 他们有各自独立的内存地址空间，也有相同的处理方式。8051和8751的程序存储器的存 储容量为4KB地址从0000H开始，在使用过程中其中的数据不变。8051、8751、8031数据存储器的内存为128B,默认地址是00FH,用于保存中间数据和缓存。在这128B的内存中，有32 bytes，被称作工作寄存器，和常用的微处理器不

5、同的是，8051的RAM是按功能来划分模块的。MCS - 51系列单片机和一般电脑的处理方式不同。一般电脑会自 动分配地址空间，ROM和 RAM勺计算机可以安排在不同的空间内，地址范围会根据ROM和RAM勺位置分配不同地址空间。在访问的内存，不管是ROM和 RAM只有一个地址对应 一个内存单元，都要按这个顺序访问。这种内存结构是所谓的普林斯顿结构。8051的存 储器按物理结构划分可分为程序存储器空间和数据存储空间，共有四个内存空间，按结 构位置的不同分为内部程序存储空间、外部程序存储空间、内部数据存储空间和外部数 据存储空间。但从用户的使用角度看，8051存储器地址空间被分成三类：（1）片内，

6、安 排FFFFH勺块，片外的（使用16个地址）串口 0000H地址。（2）外部数据存储器地址空 间为64KB地址是从0000H到FFFFH （含16个地址）的位置排列也。（3） 256B的数据 存储器（使用8个地址）的地址空间。上述三个重叠的内存空间地址，用8051指令系统的传输不同的数据和使用的功能区分。CPU勺访问内存时，访问ROM!用MOV语句，访问RAM块顺序使用片外操作的MOVXg句，访问内存片段使用 MOV语句。8051单片机有4个8并行的I / O 端口，分别为P0, P1，P2和P3。每个端口是8 位精确的双向口，共占了 32针。每一个I / O线可作为独立的入口和出口。每个端

7、口包 括一个锁存器（即特殊功能寄存器），一个出口驱动器和引进缓冲器。使数据能够锁存输 出，数据可以及时缓冲，其余四个具有相同的功能。接外部存储扩大它们的内存时，这 四个口就可作为双向口常用的I / O 口，这是，P2 口看到高8位地址，P0 口是一个公共 两用口，传送输出低8的地址和数据。8051单片机四个I/O端口的电路设计非常巧妙。熟悉I/O端口逻辑电路，不但有利 于正确合理地使用端口，而且会对设计单片机外围逻辑电路有所启发。端口的负载能力 和接口都有一定要求，由于P0 口的输出级与P1-P3 口的输出级在结构上是不同的，因此， 它门的负载能力和接口要求也各不相同。P0 口与其他口不同，它

8、的输出级无上拉电阻。当把它用作通用口使用时，输出级是开漏电路，故用其输出去驱动NMO输入时需外接上 拉电阻。用作输入时，应先向口锁存器写 1。P0 口的每一位输出可驱动8个LS型TTL负 载。P1 口也是一个准双向口，用作通用I/O。其电路的输出部分与P0 口不同，内部有上 拉负载电阻与电源相连。实质上，电阻是两个场效应管FET并在一起：一个FET为负载管，其电阻固定。另一个可工作在导同或截止两种状态，使其总电阻值变化近似0或组值很大两种情况。当电阻近似为 0时，可将引脚快速上拉至高电平；当电阻值很大时， P1 口为高阻输入状态。当P1 口输出高电平时，能向外提供拉电流负载，所以不必再接上拉电

9、阻。在端口用作输入时，也必须先向对应的锁存器写入1,使FET截止。由于片内负 载电阻较大约20千欧姆到40千欧姆，所以不会对输入的数据产生影响。P2 口某位的结构与P0 口类似，有MU）开关。驱动部分与P1 口类似，但比P1 口多了一个转换控制部分。 P3 口是一个多功能端口，它比P1 口多了“与非”门3和缓冲器4。正是这两部分，使得 她除了具有P1 口的准双向功能之外，还可以使用各引脚所具有的第二功能。“与非”门3 的作用实际上是一个开关，决定是输出锁存器上的数据还是输出第二功能的信号。当W=1时，输出Q端信号；当Q=1时，可输出W线信号。编程时，可不必事先有软件设置 P3 口 为第一功能还

10、是第二功能。当 CPU对P3 口进行SFR寻址（位或字节）访问时，有内部硬 件自动将第二功能输出/输入线时，有内部硬件锁存器 Q=1. P3 口的工作原理与P1 口类 似。P1-P3 口的输出级接有内部上拉负载电阻，它们的每一位输出可驱动4个LS型TTL负载。作为输入口时，任何TTL或NMO电路都能以正常的方式驱动 8051单片机的P1-P3 口。由于它们的输出级具有上拉电阻，也可以被集电极开路或漏极开路所驱动，而无需 外接上拉电阻。口也都是准双向口。作为输入时，必须先对相应端口锁存器写1。对于80C51单片机，端口只能提供几毫安的输出电流，故当作输出口去驱动一个普通晶体管的 基极时，应在端口

11、与晶体管基极间串联一个电阻，以限制咼电平输出时的电流。P1-P3复位是单片机的初始化操作。其主要功能是把PC初始化为0000H使单片机从0000H单元开始执行程序。除了进入系统的正常初始化之外，当由于程序运行出错或操作错误使 系统处于死锁状态时，为摆脱困境，也需按复位键重新启动。在8051中RST引脚是复位信号的输入端。复位信号是高电平有效，其有效时间应持续24个振荡周期（即二个机器周期）以上。若使用频率6兆赫兹的晶振，则复位信号持续时间应超过 4微妙才能完成 复位操作。整个复位电路包括芯片内，外两部分。外部电路产生的复位信号（RST）送至施密特触发器，再有片内复位电路在每个机器周期的 S5P

12、2时刻对施密特触发器的输出进行 采样，然后才得到内部复位操作所需的信号。一般复位电路中的电阻，电容参数适用于6晶振，能保证复位信号高电平持续时间大于2个机器周期。复位电路虽然简单，但其作用非常重要。一个单片机系统能否正常运行，首先要检查是否能复位成功。初步检查可 用示波器探头监视引脚，按下复位键，观察是否有足够幅度的波形输出（瞬时的），还可以通过改变复位电路来进行实验。本文摘译自单片机数据手册Structure and function of the MCS-51 seriesStructure and function of the MCS-51 series one-chip comput

13、er is a name of a piece of on e-chip computer series which In tel Compa ny produces. This compa ny in troduced 8 top-grade one-chip computers of MCS-51 series in 1980 after introducing 8 one-chip computers of MCS-48 series in 1976. It bel ong to a lot of kinds this line of on e-chip computer the chi

14、ps have such as 8051,8031, 8751,80C51BH, 80C31BH, etc, their basic composition, basic performance and instruction system are all the same. 8051 daily representatives-51 serial on e-chip computers.A one-chip computer system is made up of several following parts: (1) One microprocessor of 8 (CPU). At

15、slice data memory RAM (128B/256B),it use not depositing not can reading /data that write, such as result not middle of operation, final result and data wan ted to show, etc. Procedure memory ROM/EPROM (4KB/8KB), is used to preserve the procedure , some initial data and form in slice. But does not ta

16、ke ROM/EPROM within some on e-chip computers, such as 8031,8032, 80C51, etc. (4) Four 8 run side by side I/O in terface P0 four P3, each mouth can use as introduction, may use as exporting too. (5) Two timer / counter, each timer / counter may set up and count in the way, used to count to the extern

17、al incident, can set up into a timing way too, and can according to count or result of timing realize the con trol of the computer. (6) Five cut off cutt ing off the con trol system of the source. (7) One all duplex serial I/O mouth of UART (universal asynchronous receiver/transmitter (UART) ), is i

18、t realize on e-chip computer or on e-chip computer and serial com muni cati on of computer to use for. (8) Stretch oscillator and clock produce circuit, quartz crystal finely tune electric capacity n eed outer. Allow oscillatio n freque ncy as 12 megahertz now at most. Every the above-me nti oned pa

19、rt was joined through the in side data bus .Am ong them, CPU is a core of the on e-chip computer, it is the con trol of the computer and comma nd cen tre, made up of such parts as arithmetic unit and controller , etc. The arithmetic unit can carry on 8 persons of arithmetic operation and unit ALU of

20、 logic operation while including one, the 1 storing device temporary of 8, storing device 2 temporarily, 8s accumulation device ACC, register B and procedure state register PSW, etc. Pers on who accumulate ACC count by 2 in put ends en tered of checking etc. temporarily as one operation often, come

21、from person who store 1 operation is it is it make operation to go on to count temporarily , operation result and loopback ACC with another one. In addition, ACC is often regarded as the transfer station of data transmission on 8051 in side. The same as gen eral microprocessor, it is the busiest reg

22、ister. Help rememberi ng that agreeing with an expresses in the order. The controller includes the procedure counter, the order is deposited, the order deciphers the oscillator and timing circuit, etc. The procedure coun ter is made up of coun ter of 8 for two, amounts to 16. It is a byte address co

23、un ter of the procedure in fact, the content is the next IA that will carried out in PC. The content which cha nges it can cha nge the directi on that the procedure carries out. Shake the circuit in 8051 one-chip computers, only need outer quartz crystal and frequency to finely tune the electric cap

24、acity, its frequency range is its 12MHZ of 1.2MHZ. This pulse signal, as 8051 basic beats of working, namely the minimum unit of time. 8051 is the same as other computers, the work in harmony under the control of the basic beat, just like an orchestra according to the beat play that is comma nded.Th

25、ere are ROM (procedure memory , can only read ) and RAM in 8051 slices (data memory, can is it can write ) two to read, they have each independent memory address space, dispose way to be the same with gen eral memory of computer. Procedure 8051 memory and 8751 slice procedure memory capacity 4KB, ad

26、dress beg in from 0000H, used for preserv ing the procedure and form constant. Data 8051- 8751 8031 of memory data memory 128B, address false 00FH, use for middle result to deposit operation, the data is stored temporarily and the data are buffered etc. In RAM of this 128B, there is unit of 32 bytes

27、 that can be appo in ted as the job register, this and gen eral microprocessor is differe nt, 8051 slice RAM and job register rank one formatio n the same to arrange the locati on .It is not very the same that the memory of MCS-51 series one-chip computer and general computer disposes the way in add

28、ition. General computer for first addressspace, ROM and RAM can arrange in different space within the range of this address at will, namely the addresses of ROM and RAM, with distributi ng differe nt address space in a formati on. While visit ing the memory, corresp onding and only an address Memory

29、 unit, can ROM, it can be RAM too, and by visiting the order similarly. This kind of memory structure is called the structure of Princeton. 8051 memories are divided into procedure memory space and data memory space on the physics structure, there are four memory spaces in all: The procedure stores

30、in one and data memory space outside data memory and one in procedure memory space and one outside one, the structure forms of this kind of procedure device and data memory separated form data memory, called Harvard structure. But use the an gle from users, 8051 memory address space is divided in to

31、 three kin ds: (1) in the slice, arran ges blocks of FFFFH, 0000H of locati on, in unison outside the slice (use 16 addresses).(2) The data memory address space outside one of 64KB, the address is arran ged from 0000H 64KB FFFFH (with 16 addresses) too to the locati on. Data memory address space of

32、256B (use 8 addresses).Three above-mentioned memory space addresses overlap, for distinguishing and designing the order symbol of different data transmission in the instruction system of 8051: CPU visit slice, ROM order spend MOVC , visit block RAM order uses MOVX outside the slice, RAM order uses M

33、OV to visit in slice.8051 on e-chip computer have four 8 walk abreast I/O ports; call P0, P1, P2 and P3. Each port is 8 accurate two-way mouths, acco unts for 32 pins altogether. Every one I/O line can be used as in troducti on and exported in depe nden tly. Each port in cludes a latch (n amely spec

34、ial fun cti on register): one exports the driver and an in troducti on buffer. Make data can latch whe n outputting, data can buffer when making introduction , but four function of pass away these self-same. Expand among the system of memory outside having slice, four ports these may serve as accura

35、te two-way mouth of I/O in com mon use. Expa nd among the system of memory outside hav ing slice, P2 mouth see high 8 address off; P0 mouth is a two-way bus, send the in troducti on of 8 low addresses and data / export in timeshari ng.The circuit of 8051 one-chip computers and four I/O ports is very

36、 ingenious in design. Familiar with I/O port logical circuit, not only help to use ports correctly and rati on ally, and will in spire to desig ning the peripheral logical circuit of on e-chip computer to some exte nt. Load ability and in terface of port have certa in requireme nt, because output gr

37、ade, P0 of mouth and P1 end output, P3 of mouth grade differe nt at structure, so, the load ability and in terface of its door dema nd to have no thi ng in com mon with each other. P0 mouth is differe nt from other mouth, it output grade draws the resista nce supreme. When using it as the mouth in c

38、om mon use to use, output grade is it leak circuit to turn on, is it is it urge NMOS draw the resistance on taking to be outer with it while in putt ing to go out to fail. When being used as in troductio n, should write 1 to a latch first. Every one with P0 mouth can drive 8 Model LS TTL load to exp

39、ort. P1 mouth is an accurate two-way mouth too, used as I/O in com mon use. Differe nt from P0 mouth output of circuit its, draw load resista nce link with power on in side have. In fact, the resistance is that two effects are in charge of FET and together: One FET is in charge of load, its resistan

40、ce is regular. Another one can is it lead to work with close at two states, make its preside nt resista nce value cha nge approximate 0 or group value heavy two situati on very. When it is 0 that the resistance is approximate , can draw the pin to the high level fast ; When resistance value is very

41、large, P1 mouth, in order to hinder the introduction state high. Output as P1 mouth high electricity at ordinary times, can is it draw electric current load to offer outwards, draw the resista nce on n eed nt an swer and the n. Here whe n the port is used as introduction, must write into 1 to the co

42、rresponding latch first too, makes FET end. Relatively about 20,000 ohms because of the load resista nce in sce ne and because of 40,000 ohm will not exert an in flue nce on the data that are in put. The structure of P2 some mouth is similar to P0 mouth, there are MUX switches. Is it similar to mout

43、h partly to urge, but mouth large a conversion controls some than P1, P3 mouth one multi-functional port, mouth getting many than P1 it have and 3 doors and 4 buffers. Two parts these, make her besides accurate two-way function with P1 mouth just, can also use the second function of every pin, and d

44、oor 3 functions one switch in fact, it determ ines to be to output data of latch to output sec ond sig nal of function. Act as W =at 1 oclock, output Q end sig nal; Act as Q =at 1 oclock, can output W line sig nal. At the time of program min g, it is that the first function is still the sec on d fun

45、 cti on but n eed nt have software that set up P3 mouth in adva nee. It hardware not in side is the automatic to have two function outputted when CPU carries on SFR and seeks the location (the locati on or the byte ) to visit to P3 mouth /at not lasti ng lining, there are in side hardware latch Qs =

46、1.The operation principle of P3 mouth is similar to P1 mouth.Output grade, P3 of mouth, P1 of P1, connect with in side have load resista nee of draw ing, every one of they can drive 4 Model LS TTL load to output. As while in putt ing the mouth, any TTL or NMOS circuit can drive P1 of 8051 on e-chip

47、computers as P3 mouth in a no rmal way. Because draw resista nee on output grade of them have, can ope n a way collector too or drain-source resistance is it urge to open a way, do not need to have the resistance of drawing outer. Mouths are all accurate two-way mouths too. Whe n the con duct is in

48、put, must write the corresponding port latch with 1 first. As to 80C51 one-chip computer, port can only offer use of output electric curre nts, is it output mouth go whe n urgi ng one ordinary bas ing of tran sistor to regard as, should con tact a resista nce among the port and tran sistor base, in

49、order to the electricity while restraining the high level from exporting P1P3 Being restored to the throne is the operation of initializing of an one-chip computer. Its main function is to turn PC into 0000H in itially, make the on e-chip computer beg in to hold the con duct procedure from unit 0000H. Except that the ones that enter the system are initialized normally, as because procedure operate it make mistakes or operate there arent mistake, in order to extricate on eself from a predicament, need to be pressed and restored to the throne the key restarti