DESIGN OF A TWO-CHANNEL SOLID-STATE一个双通道固态设计

1、1.IntroductionThe project involved designing and constructing a high-fidelity Class-A amplifier. Design was solid-state based and biased with a constant current source in a push-pull configuration. The final product is to be compatible for use with any conventional audio input, which has been pre-am

2、plified, and output is to be coupled through conventional 8 speakers.The choice of solid-state over vacuum tubes is largely because solid-state amplifiers are more dynamic in nature, and are hence better able to amplify frequencies in the low to mid-range, and because solid-state amplifiers are more

3、 cost effective A good pair of matched MOSFETs will cost approximately $20 whereas a matched pair of tubes can run into hundreds of dollars. and have lower maintenance Depending on usage, tubes need to be changed once every one to two years while solid-state amplifiers are relatively maintenance fre

4、e. costs than their counterparts.Overview of Output ClassificationsOutput stages of amplifiers are classified according to the standards shown in Table 1.1. Table SEQ Table * ARABIC 1.1 Classification of Output StagesClassDefinitionALinear operation with 360 operation of a sine wave. Operating point

5、 is set at about the center of the operating range and in operation, the output signal produces approximately equal excursions towards the two axesBTransistors are biased to cut-off, such that only 180 conduction can occur. “Push-pull” operation is necessary with each half of the output amplifier al

6、ternately supplying the two halves of the output signal.ABSmall forward bias and output stages are not completely cut-off.CStage is biased beyond cut-off, allowing less than 180 conduction.1.2Class-A OperationClass-A generally offers the lowest distortion among the output classes and since high fide

7、lity and low distortion is desired for this project, the design is based on Class-A operation. The primary virtue of Class-A lies in the smooth characteristics of its operation parameters. The gain transistors are operated in the linear region only, where distortions are limited to smooth, simple fo

8、rms, unlike abrupt distortions created in Class-B amplifiers when the transistors switch on and off. In Class-A operation, transistors are always on, and this eliminates the turn-on/turn-off delays that characterize the crossover of Class-B and Class-AB amplifiers. The high bias current used in Clas

9、s-A also eliminates discontinuities in the transfer function due to crossover distortions. This does come at a cost though. Class-A amplifiers generally dissipate a lot of heat and hence require extensive heat sinking and have efficiencies in the 20% range. This low efficiency also necessitates oper

10、ation of a large power supply to power up the circuit.Design OverviewThe design of a power amplifier would take the form of an input stage coupled to the preamplifier that handles low-power switching functions driving a high-power output gain stage that ultimately drives the speaker load. Design Spe

11、cificationsHigh fidelity, parlayed with low distortion, is the primary goal of this project, and is most critical. Frequency response of the amplifier must also be within the limits of a high-fidelity audio amplifier in the 20Hz to 20kHz range, and the power output level must also provide reasonable

12、 signal amplification. Linear amplification across frequencies will also be desired.The exact specifications are slated as follows:Power: 10 30 WPC into 820 60 WPC into 4 Total Harmonic Distortion: 10% at rated outputFrequency Response:20Hz 20kHz with 3dB attenuationDesign ProcedureVarious Class-A D

13、esignsClass-A amplifiers have different efficiency factors depending upon the design. The least efficient is the circuit of Fig. 2.1a, where the transistor is biased by a resistor and whose AC output power to the load is less than 20 per cent of its idling dissipation. Figure 2.1a Biasing via Resist

14、orFig. 2.1b shows the same configuration where a constant current source replaces the resistor, improving the linearity and efficiency of the circuit. The value of the constant current source must be equal to or greater than the maximum output current. For an 80W peak (40W, rms) into 8 Ohms, therefo

15、re, the current must be at least 3.2A, which practically speaking means a worst case dissipation of 200W per channel in the idling output stage. Figure 2.1b Biasing via Constant Current SourcePush-pull circuitry more or less doubles the efficiency of a class A output stage (Fig. 2.1c) because unlike

16、 the constant current source design, its idle current need be only one half the peak output current, or 1.6A in the example, for an idling dissipation of about 100W for a 40W amplifier.Figure 2.1c Push-Pull CircuitryInitial DesignThe initial design was balanced single-ended, given that each half of

17、the circuit was clearly single-ended, yet both halves of the circuit form a differential balanced amplifier. A schematic of the initial design is given in Appendix A. A balanced signal is presented at the gates of a differential pair of matched MOSFETs. Balanced operation was desirable as it enabled

18、 a reduction of electrical noise through the circuitrys inherent quality of rejecting the common signal. In a balanced circuit, two opposite phases of the signal are present on otherwise identical input lines. Both the input and output signals have plus and minus polarities. The circuit will amplify

19、 the difference between the two inputs and display a difference signal at the output. This means that the circuit will not amplify any portion of the signal that is the same at both inputs. Ideally, it will completely reject the common input signal. Since noise picked up is common to both input line

20、s, it will be rejected at the input of the balanced circuit. . Balanced circuits normally have 90% less background noise than normal designs.Problems with Initial DesignPreliminary calculations and SPICE simulations show that the 8 resistors connected to the source and drain pins of the MOSFETs will

21、 dissipate an estimated 200W. A check with major suppliers revealed that such power resistors cost approximately $15 each. Since we require six of these resistors in each channel, it represents significant costs to our project. Furthermore, this large amount of heat dissipated results in an efficien

22、cy of just 15%, which in our opinion, was too low. Hence, we abandoned our initial design in pursuit of lower costs and higher efficiency with minimum loss in performance.2.4Subsequent Design An attempt was made to improve efficiency and a constant source was implemented to bias the MOSFETs in place

23、 of the resistors. Constant current sourcing is a technique used to achieve high gain and linearity by biasing transistors heavily without loading down the gain as a resistor current source would. A constant current source delivers a specified value of dc current regardless of fluctuations of the po

24、wer supply or voltage swings of the amplifier, resulting in less distortion and noise. By replacing the power resistors with a Wilson current source, simulation results show that efficiency was improved from 15% to 20%. However, the small resistance values of the components used would necessitate us

25、ing precision parts, which are correspondingly high in cost. Taking this into consideration, we explored further possibilities in the design with aims of reducing cost, improving efficiency and maintaining performance.Final DesignIt was finally decided to abandon balanced operation and instead opt f

26、or “push-pull” circuitry, which would approximately double the efficiency of the output stage. Unlike the constant current source design, the idling current required to bias the transistors will only be one half the peak output current, thereby almost doubling efficiency. The schematic for the desig

27、n is given in Appendix A. Simulations show that with this design, efficiencies of 40% could be achieved. Since the output stage resistors only dissipates under a watt of heat each, they represent a considerably smaller cost to out budget. We decided to adopt this design as it offered the lowest cost

28、, highest efficiency while only sacrificing minimum performance.3.Design Details Design ConceptThe basic concept of the design is given in Fig. 3 of Appendix A. A differential NPN differential front end drives a PNP voltage gain transistor. Both parts of the circuit are biased with the constant curr

29、ent sources as shown, and the signal from the collector of the PNP is followed by the Darlington Class-A output stage whose idle current is controlled by the bias circuit.Actual circuitThe schematic of the circuit is given in Fig. 4 of Appendix A. Breaking down the schematic of the actual unit, an i

30、nput roll-off filter is formed by C1 in conjunction with the typical 600 to 1k source impedance. Lower frequency roll-off can be achieved using higher capacitance values and higher source resistance values. The transistors Q1 and Q2 form the differential pair but some twists are added to the feedbac

31、k and input networks. The feedback formed by R3, R4, R5, C2 and C4 is used to bootstrap the input impedance to a nominal value of 40k while providing a low impedance path for the input bias currents. This results in a high input impedance with low offset voltage. The capacitor C4 creates a high freq

32、uency input to the negative feedback, which rolls off the high frequency gain of the amplifier.C4 frequency compensates the amplifier by creating internal feedback which allows the front end of the amplifier to work at satisfying the high frequency loop requirements, ignoring the phase effects of th

33、e output stage and providing a high degree of stability for the system. As a form of feed forward technique, it does not impair the slew capabilities as lag compensation would, and comes into play at around 200kHz.The two current sources formed by Q3, R7 and Q4, R10 are driven by the voltage source

34、D1, D2, which is a reference diode pair which produces 1.3V when forward biased by the current following through the current source Q11. This 1.3V at the base of Q3 results in a drop of 0.6V across R7, giving the current source a value of 2mA. Q4 thus operates at 6mA and has the addition of R8, whic

35、h prevents the reference voltage from collapsing when Q4 saturates during a negative clip, improving the recovery time.Q11 and R8 serve to feed current to the diodes D1 and D2, which provide the voltage reference for the current sources. Q11 and R8 form a current source, and compared to biasing via

36、resistors, they provide a higher power supply rejection for the negative half of the circuit and lowers ripple voltage noise and distortion by about 20dB.Biasing the circuitThe bias network of Q6, D3 and R12, R13 serves to control the idling current of the output stage. It starts out as a convention

37、al VBE multiplier consisting of R11, R12 and Q6, where the voltage developed across Q6 isThe addition of D3 and R13 provide feedback, treating the base of the transistor as the negative input of a summing amplifier. The differential voltage between the emitters of Q7 and Q6 is relatively constant an

38、d the bias circuit rejects the ac signal, and any remaining ac ripples are cleaned up by C3. Thus the bias circuit watches dc bias and ignores the signal.4.Design VerificationPowerThe power amplifier was powered at a power supply voltage of plus and minus 32V. With this setup, the amplifier consumed

39、 96W (rms) on average. The maximum power output measured into the speaker load was 30W. However, at this power rating, the amount of heat generated was a concern as it necessitates large heatsinks with a 0.25 Celsius/Watt thermal characteristic. With this much sinking, the 100W idling dissipation wi

40、ll raise the sink temperature at 25C above ambient for a temperature of 50C.EfficiencyFrom the power measurement given above, the efficiency can be calculated, withEfficiency = Maximum power output/Total idling powerThis calculation gives an efficiency rating of 31.25% for the Class-A “push-pull” po

41、wer amplifier design employed.Total Harmonic DistortionUsing the Tektronix TM 503, tests were conducted to measure the frequency response of the amplifier. Using an input frequency ranging from 20Hz to 20kHz, the harmonic distortion of the amplifier was measured at discrete frequencies and given in

42、table 4.1. Table 4.1 Total Harmonic Distortion Test ResultsFrequencyDistortion20 Hz0.67%50 Hz1.21%100 Hz1.96%200 Hz2.23%500 Hz2.17%1 kHz2.12%2 kHz2.48%5 kHz2.19%10 kHz1.87%20 kHz0.46%Figure 4.1 Distortion Response for AmplifierThe results show that the amplifier distorts the signal by an average of

43、2% over the frequency range of 20Hz to 20kHz. Since our design specifications called for a distortion under 10%, our amplifier far surpassed what specifications called for. However, high-fidelity audio amplifiers normally exhibit a distortion of under a percent. A possible reason for the distortion

44、figures is the parts used. High-fidelity amplifiers normally use resistors with a tolerance of 0.5% and capacitors with a tolerance of 10%. The resistors we used had tolerances of 1% to 5% while the capacitors we used had tolerances of 20%. It is predicted that distortion figures will definitely be

45、smaller if parts with lower tolerances were used. Precision parts could not be used for this project due to budget restraints imposed.Frequency ResponseFrequency Response tests were conducted and a sinusoidal input was applied to the amplifying circuit and the output was displayed on the oscilloscop

46、e. The voltage gain in decibels was calculated. Table 4.1 shows the results of the test at discrete frequencies while Figure 4.1 shows the plot of Gain (dB) versus Frequency (Hz).Table 4.2 Frequency Response Test ResultsFrequencyGain (V)Gain (dB)Deviation from Mean (dB)20 Hz50 Hz100 Hz200 Hz500 Hz1 kHz2 kHz5 kHz10 kHz20 kHzFigure 4.2 Frequency ResponseThe results show that frequency response was relatively linear over the range of frequencies from 20 Hz to 20 kHz and remained within 0.4dB. The results far surpassed our design specifications, wh