FPGA可编程逻辑器件芯片5M1270ZF256C5N中文规格书

1、 II II SII52008-4.5IntroductionSystem designers today face difficult challenges such as shortened designcycles, evolving standards, and system deployments in remote locations.Stratix II and Stratix II GX FPGAs help overcome these challenges withtheir inherent re-programmability and dedicated circuit

2、ry to performremote system upgrades. Remote system upgrades help deliver featureenhancements and bug fixes without costly recalls, reduce time-to-market, and extend product life.StratixII and Stratix II GX FPGAs feature dedicated remote systemupgrade circuitry. Soft logic (either the Niosembedded pr

3、ocessor or userlogic) implemented in a StratixII or Stratix II GX device can download anew configuration image from a remote location, store it in configurationmemory, and direct the dedicated remote system upgrade circuitry toinitiate a reconfiguration cycle. The dedicated circuitry performs errord

4、etection during and after the configuration process, recovers from anyerror condition by reverting back to a safe configuration image, andprovides error status information. This dedicated remote system upgradecircuitry is unique to Stratix, Stratix II, and Stratix II GX FPGAs and helpsto avoid syste

5、m downtime.Remote system upgrade is supported in all StratixII and Stratix II GXconfiguration schemes: fast passive parallel (FPP), active serial (AS),passive serial (PS), and passive parallel asynchronous (PPA). Remotesystem upgrade can also be implemented in conjunction with advancedStratixII and

6、Stratix II GX features such as real-time decompression ofconfiguration data and design security using the advanced encryptionstandard (AES) for secure and efficient field upgrades.This chapter describes the functionality and implementation of thededicated remote system upgrade circuitry. It also def

7、ines severalconcepts related to remote system upgrade, including factoryconfiguration, application configuration, remote update mode, localupdate mode, the user watchdog timer, and page mode operation.Additionally, this chapter provides design guidelines for implementingremote system upgrade with th

8、e various supported configurationschemes.Document Revision HistoryDecompression” sectionUpdated “Active Serial ConfigurationsectionAdded new “Output Configuration Pins”section.Correctedin Table1322.Added the “Document Revision History”section to this chapter.April 2006, v4.2Chapter updated as part o

9、f the Stratix IIDevice Handbookupdate.No changeChapter updated as part of the Stratix IIDevice Handbookupdate.October 2005v4.0Added chapter to the Stratix II GX DeviceHandbook.Stratix II Device Handbook, Volume2Functional DescriptionFunctionalDescriptionThe dedicated remote system upgrade circuitry

10、in StratixII andStratixIIGX FPGAs manages remote configuration and provides errordetection, recovery, and status information. User logic or a Nios processorimplemented in the FPGA logic array provides access to the remoteconfiguration data source and an interface to the systems configurationmemory.S

11、tratixII and Stratix II GX FPGAs remote system upgrade processinvolves the following steps:1. A Nios processor (or user logic) implemented in the FPGA logicarray receives new configuration data from a remote location. Theconnection to the remote source is a communication protocol suchas the transmis

12、sion control protocol/Internet protocol (TCP/IP),peripheral component interconnect (PCI), user datagram protocol(UDP), universal asynchronous receiver/transmitter (UART), or aproprietary interface.2. The Nios processor (or user logic) stores this new configuration datain non-volatile configuration m

13、emory. The non-volatileconfiguration memory can be any standard flash memory used inconjunction with an intelligent host (for example, a MAXdevice ormicroprocessor), the serial configuration device, or the enhancedconfiguration device.3. The Nios processor (or user logic) initiates a reconfiguration cyclewith the new or updated configuration data.4. The dedicated remote syst