计算机组成与结构：chapter11 Instruction SetsAddressing Modes and Formats

ComputerOrganization&ArchitectureChapter11

InstructionSets:AddressingModesandFormats11.1AddressingtypesDef.:amethodtodeterminethedataaddressinthecurrentinstructionornextinstructionaddressDependsonCPUhardwareandaffectsinstructionformatandfunctionTwotypesInstructionaddressingSequenceaddressingJumpaddressingDataaddressingAddressingModesImmediateDirectIndirectRegisterimplicitRegisterIndirectDisplacement(Indexed)StackImmediateAddressingOperandispartofinstruction,Operand=addresse.g.ADD5Add5tocontentsofaccumulator5isoperandWhenitisloadedintoadataregister,thesignbitisextendedtothelefttofulfilldatawordsizeThesimplestaddressingmode,noneedtoaccessmemoryorcacheFastLimitedrangeApplications:DefineanduseconstantsSetinitialvaluesofvariable

ImmediateAddressingDiagrammodeDirectAddressingAddressfieldcontainseffectiveaddressofoperandEffectiveaddress(EA)=addressfield(A)e.g.MOVA,[1070H]Movethecontentofaddress1070HtoA1070Hisamemoryaddress.SinglememoryreferencetoaccessdataNoadditionalcalculationstoworkouteffectiveaddressLimitedaddressspace

DirectAddressingDiagramImplicitAddressingTheaddressofoperandisnotexplicitlypresented,ithidesintheopcodeoraspecialregister,suchasACADD5IndirectAddressingMemorycellpointedtobyaddressfieldcontainstheaddressof(pointerto)theoperandEA=(A)LookinA,findaddress(A)andlookthereforoperande.g.load(A)loadthecontentoftheaddressthatthecontentofmemoryaddressApointtoaccumulatorAC.Largeaddressspace2nwheren=wordlengthMaybenested,multilevel,cascadede.g.EA=(((A)))NogainsDrawthediagramyourselfMultiplememoryaccessestofindoperandHenceslowerIndirectAddressingDiagramRegisterAddressingOperandisheldinregisternamedinaddressfiledEA=RLimitednumberofregistersVerysmalladdressfield:3~4bitsShorterinstructionsFasterinstructionfetchNomemoryaccessVeryfastexecutionVerylimitedaddressspaceProgrammerdecideswhichvaluesshouldremaininregistersandwhichshouldbestoredinmainmemoryForthevariablesusedfrequently,you’dbetterdefinethemasregistervariable.E.g.registerint

i,j;RegisterAddressingDiagramRegisterIndirectAddressingSimilartoindirectaddressing(addressinregister)EA=(R)OperandisinmemorycellpointedtobycontentsofregisterRLargeaddressspace(2n)OnefewermemoryaccessthanindirectaddressingRegisterIndirectAddressingDiagramDisplacementAddressingAverypowerfulmodeofaddressingdirectaddress+registerindirectaddressingEA=A+(R)AddressfieldholdtwovaluesA=basevalueR=registerthatholdsdisplacementorviceversa

DisplacementAddressingDiagramTheMostCommonUsesofDisplacementAddressRelativeAddressingBase-registerAddressing

IndexingRelativeAddressingAversionofdisplacementaddressingR=Programcounter,PCEA=A+(PC)Aisdisplacement,treatedascomplementTheeffectiveaddressisadisplacementrelativetotheaddressofcurrentinstructioni.e.getoperandfromAcellsfromcurrentlocationpointedtobyPCUsedforjumpBase-RegisterAddressingEA=A+(R)AholdsdisplacementRholdsbaseaddressRmaybeexplicitorimplicite.g.segmentregistersin80x86UsedforaddresstransformbyOSIndexedAddressingA=baseR=displacementEA=A+RGoodforaccessingarraysorloopprogrammingEA=A+RR++Directaddressingvs.indexaddressingLoadACDAddD+1AddD+2…AddD+99LoadX0AddX,DINXCPX99BNEM

MAC=AC+[D+(X)]Sumof100numbersDirectaddressingIndexaddressingCombinationsPost-indexEA=(A)+(R)ContentofA+contentofRUsedforaccessingdatablockPre-indexEA=(A+(R))A+contentofRAccessingtableStackAddressingOperandis(implicitly)ontopofstacke.g.PopOPR PoptoptwoitemsfromstacktoOPR Twoimplementmodesofstack:Hardstack:registersSoftstack:memoryTopispointedbySPregisterStackaddressingis

an

implicitaddressingThesameasregisterindirect11.2Pentium&PowerPCaddressingmodeAddressingmodesofPentiumIIPentiumIIincludesavarietyofaddressingmodessothatthehigh-levellanguageprogramscanrunefficientlyFig11.2indicatesthehardwareinvolvedSixsegmentregisters,eachholdsthestartingaddressofthecorrespondingsegmentOnebaseregisterandoneindexregisterPIIAddressingModeCalculationPentiumIIAddressingModes(1)ImmediatemodeA=operand,byte,word,doubleword(2)Directaddressing(3)Indirectaddressing(4)RegisteroperandmodeOperandislocatedinaregister,maybeoneof32-bit(EAX,EBX,ECX,EDX,ESI,EDI,ESP,EBP),16-bit(AX,BX,CX,DX,SI,DI,SP,BP),8-bitgeneralregisters(AH,BH,CH,AL,BL,CL,DL)orsegments(CS,DS,ES,SS,FS,GS)Operandmaybe64-bitsfloatingpointoperandsconsumetwo32-bitregisters(5)Registerindirectmode(6)DisplacementmodeLA=(SR)+AContentofsegmentregister+8,16or32-bitoffset(7)BasemodeLA=(SR)+(B)Addressinsegmentregister+addresssinbaseregister(8)BasewithdisplacementmodeLA=(SR)+(B)+AAccessingvariable,array(9)ScaledindexwithdisplacementmodeLA=(SR)+(I)S+AI:indexingregister,S:scalingfactor(10)BasewithindexanddisplacementmodeLA=(SR)+(B)+(I)+AB:baseregister(11)BasescaledindexwithdisplacementmodeLA=(SR)+(B)+(I)S+A(12)RelativeaddressingLA=(PC)+APowerPCAddressingModesLoad/storearchitectureIndirectInstructionincludes16bitdisplacementtobeaddedtobaseregister(maybeGPregister)CanreplacebaseregistercontentwithnewaddressIndirectindexedInstructionreferencesbaseregisterandindexregister(bothmaybeGP)EAissumofcontentsBranchaddressAbsoluteRelativeIndirectArithmeticOperandsinregistersorpartofinstructionFloatingpointisregisteronly11.3InstructionFormatsDefiningLayoutofbitsinaninstructionIncludesopcodeIncludes(implicitorexplicit)operand(s)Pop,addressingmodesUsuallymorethanoneinstructionformatinaninstructionsetInstructionLengthAffectedbyandaffects:MemorysizeMemoryorganizationBusstructureCPUcomplexityCPUspeedTradeoffbetweenpowerfulinstructionrepertoireandsavingspaceProgrammerswantmoreopcodes,moreoperands,moreaddressingmodesandgreataddressspace,theseresultsinlongerinstructionlength.ButlongerinstructionlengthmaybewastefulAllocationofBitsForagiveninstructionlength,thereisclearlyatrade-offbetweenthenumberofopcodeandthepoweroftheaddressingcapabilityVariable-lengthopcodes,usinganadditionalbitindicatesitVariable-lengthinstructionsFlexibilityComplicatedCPU11.4Pentium&PowerPCinstructionformatsPIIInstructionFormatPIIisequippedwithavarietyofinstructionformats,onlyopcodefieldisalwayspresentInstructionprefixLOCKprefixExclusiveuseofsharedmemoryinmultiprocessorsystemOneofrepeatprefixesRepeatedoperationofastring(elements)SegmentoverrideExplicitlyspecifysegmentregister,overridethedefaultsegmentregisterAddresssizeDeterminethedisplacementsizeininstructionsandthendetermine32bitor