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0091、智能温度报警系统毕业设计资料,毕业设计论文

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1Rectifier Device DataC0065C0120C0105C0097C0108 C0076C0101C0097C0100C0083C0116C0097C0110C0100C0097C0114C0100 C0082C0101C0099C0111C0118C0101C0114C0121 C0082C0101C0099C0116C0105C0102C0105C0101C0114C0115This data sheet provides information on subminiature size, axial leadmounted rectifiers for generalpurpose lowpower applications.Mechanical Characteristics Case: Epoxy, Molded Weight: 0.4 gram (approximately) Finish: All External Surfaces Corrosion Resistant and Terminal Leads areReadily Solderable Lead and Mounting Surface Temperature for Soldering Purposes:220C Max. for 10 Seconds, 1/16 from case Shipped in plastic bags, 1000 per bag. Available Tape and Reeled, 5000 per reel, by adding a “RL” suffix to thepart number Polarity: Cathode Indicated by Polarity Band Marking: 1N4001, 1N4002, 1N4003, 1N4004, 1N4005, 1N4006, 1N4007MAXIMUM RATINGSRating Symbol 1N4001 1N4002 1N4003 1N4004 1N4005 1N4006 1N4007 Unit*Peak Repetitive Reverse VoltageWorking Peak Reverse VoltageDC Blocking VoltageVRRMVRWMVR50 100 200 400 600 800 1000 Volts*NonRepetitive Peak Reverse Voltage(halfwave, single phase, 60 Hz)VRSM60 120 240 480 720 1000 1200 Volts*RMS Reverse Voltage VR(RMS)35 70 140 280 420 560 700 Volts*Average Rectified Forward Current(single phase, resistive load,60 Hz, see Figure 8, TA= 75C)IO1.0 Amp*NonRepetitive Peak Surge Current(surge applied at rated loadconditions, see Figure 2)IFSM30 (for 1 cycle) AmpOperating and Storage JunctionTemperature RangeTJTstg 65 to +175 CELECTRICAL CHARACTERISTICS*Rating Symbol Typ Max UnitMaximum Instantaneous Forward Voltage Drop(iF= 1.0 Amp, TJ= 25C) Figure 1vF0.93 1.1 VoltsMaximum FullCycle Average Forward Voltage Drop(IO= 1.0 Amp, TL= 75C, 1 inch leads)VF(AV) 0.8 VoltsMaximum Reverse Current (rated dc voltage)(TJ= 25C)(TJ= 100C)IR0.051.01050AMaximum FullCycle Average Reverse Current(IO= 1.0 Amp, TL= 75C, 1 inch leads)IR(AV) 30 A*Indicates JEDEC Registered DataPreferred devices are Motorola recommended choices for future use and best overall value. Motorola, Inc. 1996Order this documentby 1N4001/DC0077C0079C0084C0079C0082C0079C0076C0065SEMICONDUCTOR TECHNICAL DATAC0049C0078C0052C0048C0048C0049C0116C0104C0114C0117C0049C0078C0052C0048C0048C0055LEAD MOUNTEDRECTIFIERS501000 VOLTSDIFFUSED JUNCTIONCASE 5903DO411N4004 and 1N4007 areMotorola Preferred DevicesRev 5ntsC0049C0078C0052C0048C0048C0049 C0116C0104C0114C0117 C0049C0078C0052C0048C0048C00552 Rectifier Device DataPACKAGE DIMENSIONSCASE 5903(DO41)ISSUE MBDKKFFADIM MIN MAX MIN MAXINCHESMILLIMETERSA 4.07 5.20 0.160 0.205B 2.04 2.71 0.080 0.107D 0.71 0.86 0.028 0.034F 1.27 0.050K 27.94 1.100 NOTES:1. ALL RULES AND NOTES ASSOCIATED WITHJEDEC DO41 OUTLINE SHALL APPLY.2. POLARITY DENOTED BY CATHODE BAND.3. LEAD DIAMETER NOT CONTROLLED WITHIN FDIMENSION.Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, andspecifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motoroladata sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”must be validated for each customer application by customers technical experts. Motorola does not convey any license under its patent rights nor the rights ofothers. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or otherapplications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injuryor death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorolaand its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney feesarising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges thatMotorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an EqualOpportunity/Affirmative Action Employer.Mfax is a trademark of Motorola, Inc.How to reach us:USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4321,P.O. Box 5405, Denver, Colorado 80217. 3036752140 or 18004412447 NishiGotanda, Shinagawaku, Tokyo 141, Japan. 81354878488Mfax: RMFAX0 TOUCHTONE 6022446609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, US & Canada ONLY 18007741848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 85226629298INTERNET: /sps1N4001/DntsFeatures Low-voltage and Standard-voltage Operation 5.0 (VCC= 4.5V to 5.5V) 2.7 (VCC= 2.7V to 5.5V) 2.5 (VCC= 2.5V to 5.5V) 1.8 (VCC= 1.8V to 5.5V)Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),1024 x 8 (8K) or 2048 x 8 (16K)2-wire Serial InterfaceSchmitt Trigger, Filtered Inputs for Noise SuppressionBi-directional Data Transfer Protocol100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) CompatibilityWrite Protect Pin for Hardware Data Protection8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write ModesPartial Page Writes are AllowedSelf-timed Write Cycle (10 ms max)High-reliability Endurance: 1 Million Write Cycles Data Retention: 100 YearsAutomotive Grade and Extended Temperature Devices Available8-lead JEDEC SOIC, 8-pin PDIP and 8-lead TSSOP Packages2-wireSerial EEPROM1K (128 x 8)2K (256 x 8)4K (512 x 8)8K (1024 x 8)16K (2048 x 8)AT24C01AAT24C02AT24C04AT24C08AT24C16Rev. 0180F06/01DescriptionThe AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial elec-trically erasable and programmable read-only memory (EEPROM) organized as128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in manyindustrial and commercial applications where low-power and low-voltage operationare essential. The AT24C01A/02/04/08/16 is available in space-saving 8-pin PDIP,(AT24C01A/02/04/08/16), 8-lead TSSOP (AT24C01A/02/04/08/16) and 8-leadJEDEC SOIC (AT24C01A/02/04/08/16) packages and is accessed via a 2-wire serialinterface. In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to5.5V), 2.5V (2.5V to 5.5V) and 1.8V (1.8V to 5.5V) versions.Pin ConfigurationsPin Name FunctionA0 - A2 Address InputsSDA Serial DataSCL Serial Clock Input WP Write ProtectNC No Connect8-lead SOIC12348765A0A1A2GNDVCCWPSCLSDA8-pin PDIP12348765A0A1A2GNDVCCWPSCLSDA8-lead TSSOP12348765A0A1A2GNDVCCWPSCLSDA1ntsBlock DiagramPin DescriptionSERIAL CLOCK (SCL): The SCL input is used to positiveedge clock data into each EEPROM device and negativeedge clock data out of each device.SERIAL DATA (SDA): The SDA pin is bi-directional forserial data transfer. This pin is open-drain driven and maybe wire-ORed with any number of other open-drain oropen-collector devices.DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1and A0 pins are device address inputs that are hard wiredfor the AT24C01A and the AT24C02. As many as eight1K/2K devices may be addressed on a single bus system(device addressing is discussed in detail under the DeviceAddressing section).The AT24C04 uses the A2 and A1 inputs for hard wireaddressing and a total of four 4K devices may beaddressed on a single bus system. The A0 pin is ano connect.The AT24C08 only uses the A2 input for hardwire address-ing and a total of two 8K devices may be addressed on asingle bus system. The A0 and A1 pins are no connects.The AT24C16 does not use the device address pins, whichlimits the number of devices on a single bus to one. TheA0, A1 and A2 pins are no connects.WRITE PROTECT (WP): The AT24C01A/02/04/16 has aWrite Protect pin that provides hardware data protection.The Write Protect pin allows normal read/write operationswhen connected to ground (GND). When the Write Protectpin is connected to VCC, the write protection feature isenabled and operates as shown in the following table.Absolute Maximum RatingsOperating Temperature -55C to +125C*NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam-age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Storage Temperature -65C to +150CVoltage on Any Pinwith Respect to Ground -1.0V to +7.0VMaximum Operating Voltage 6.25VDC Output Current 5.0 mAAT24C01A/02/04/08/162ntsAT24C01A/02/04/08/16Memory OrganizationAT24C01A, 1K SERIAL EEPROM: Internally organizedwith 16 pages of 8 bytes each, the 1K requires a 7-bit dataword address for random word addressing.AT24C02, 2K SERIAL EEPROM: Internally organized with32 pages of 8 bytes each, the 2K requires an 8-bit dataword address for random word addressing.AT24C04, 4K SERIAL EEPROM: Internally organized with32 pages of 16 bytes each, the 4K requires a 9-bit dataword address for random word addressing.AT24C08, 8K SERIAL EEPROM: Internally organized with64 pages of 16 bytes each, the 8K requires a 10-bit dataword address for random word addressing.AT24C16, 16K SERIAL EEPROM: Internally organizedwith 128 pages of 16 bytes each, the 16K requires an 11-bitdata word address for random word addressing.Note: 1. This parameter is characterized and is not 100% tested.Note: 1. VILmin and VIH max are reference only and are not tested.WP PinStatusPart of the Array Protected24C01A 24C02 24C04 24C08 24C16At VCCFull (1K) ArrayFull (2K) ArrayFull (4K) ArrayNormal Read/Write OperationUpper Half(8K) ArrayAt GND Normal Read/Write OperationsPin Capacitance(1)Applicable over recommended operating range from TA= 25C, f = 1.0 MHz, VCC= +1.8V.Symbol Test Condition Max Units ConditionsCI/OInput/Output Capacitance (SDA) 8 pF VI/O= 0VCINInput Capacitance (A0, A1, A2, SCL) 6 pF VIN= 0VDC CharacteristicsApplicable over recommended operating range from: TAI= -40C to +85C, VCC= +1.8V to +5.5V, TAC= 0C to +70C,VCC= +1.8V to +5.5V (unless otherwise noted).Symbol Parameter Test Condition Min Typ Max UnitsVCC1Supply Voltage 1.8 5.5 VVCC2Supply Voltage 2.5 5.5 VVCC3Supply Voltage 2.7 5.5 VVCC4Supply Voltage 4.5 5.5 VICCSupply Current VCC= 5.0V READ at 100 kHz 0.4 1.0 mAICCSupply Current VCC= 5.0V WRITE at 100 kHz 2.0 3.0 mAISB1Standby Current VCC= 1.8V VIN= VCCor VSS0.6 3.0 AISB2Standby Current VCC= 2.5V VIN= VCCor VSS1.4 4.0 AISB3Standby Current VCC= 2.7V VIN= VCCor VSS1.6 4.0 AISB4Standby Current VCC= 5.0V VIN= VCCor VSS8.0 18.0 AILIInput Leakage Current VIN= VCCor VSS0.10 3.0 AILOOutput Leakage Current VOUT= VCC or VSS0.05 3.0 AVILInput Low Level(1)-0.6 VCCx 0.3 VVIHInput High Level(1)VCCx 0.7 VCC+ 0.5 VVOL2Output Low Level VCC= 3.0V IOL= 2.1 mA 0.4 VVOL1Output Low Level VCC= 1.8V IOL= 0.15 mA 0.2 V3ntsNote: 1. This parameter is characterized and is not 100% tested.Device OperationCLOCK and DATA TRANSITIONS: The SDA pin is nor-mally pulled high with an external device. Data on the SDApin may change only during SCL low time periods (refer toData Validity timing diagram). Data changes during SCLhigh periods will indicate a start or stop condition asdefined below.START CONDITION: A high-to-low transition of SDA withSCL high is a start condition which must precede anyother command (refer to Start and Stop Definition timingdiagram).STOP CONDITION: A low-to-high transition of SDA withSCL high is a stop condition. After a read sequence, thestop command will place the EEPROM in a standby powermode (refer to Start and Stop Definition timing diagram).ACKNOWLEDGE: All addresses and data words are seri-ally transmitted to and from the EEPROM in 8-bit words.The EEPROM sends a zero to acknowledge that it hasreceived each word. This happens during the ninth clockcycle.STANDBY MODE: The AT24C01A/02/04/08/16 features alow-power standby mode which is enabled: (a) uponpower-up and (b) after the receipt of the STOP bit and thecompletion of any internal operations.MEMORY RESET: After an interruption in protocol, powerloss or system reset, any 2-wire part can be reset by follow-ing these steps:1. Clock up to 9 cycles.2. Look for SDA high in each cycle while SCL is high.3. Create a start condition.AC CharacteristicsApplicable over recommended operating range from TA = -40C to +85C, VCC= +1.8V to +5.5V, CL = 1 TTL Gate and100 pF (unless otherwise noted).Symbol Parameter2.7-, 2.5-, 1.8-volt 5.0-voltUnitsMin Max Min MaxfSCLClock Frequency, SCL 100 400 kHztLOWClock Pulse Width Low 4.7 1.2 stHIGHClock Pulse Width High 4.0 0.6 stINoise Suppression Time(1)100 50 nstAAClock Low to Data Out Valid 0.1 4.5 0.1 0.9 stBUFTime the bus must be free before a new transmission can start(1)4.7 1.2 stHD.STAStart Hold Time 4.0 0.6 stSU.STAStart Setup Time 4.7 0.6 stHD.DATData In Hold Time 0 0 stSU.DATData In Setup Time 200 100 nstRInputs Rise Time(1)1.0 0.3 stFInputs Fall Time(1)300 300 nstSU.STOStop Setup Time 4.7 0.6 stDHData Out Hold Time 100 50 nstWRWrite Cycle Time 10 10 msEndurance(1)5.0V, 25C, Byte Mode 1M 1M Write CyclesAT24C01A/02/04/08/164ntsAT24C01A/02/04/08/16Bus TimingSCL: Serial Clock, SDA: Serial Data I/OWrite Cycle TimingSCL: Serial Clock, SDA: Serial Data I/ONote: 1. The write cycle time tWRis the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.tWR(1)5ntsData ValidityStart and Stop DefinitionOutput AcknowledgeAT24C01A/02/04/08/166ntsAT24C01A/02/04/08/16Device AddressingThe 1K, 2K, 4K, 8K and 16K EEPROM devices allrequire an 8-bit device address word following a start con-dition to enable the chip for a read or write operation (referto Figure 1).The device address word consists of a mandatory one,zero sequence for the first four most significant bits asshown. This is common to all the EEPROM devices.The next 3 bits are the A2, A1 and A0 device address bitsfor the 1K/2K EEPROM. These 3 bits must compare totheir corresponding hard-wired input pins.The 4K EEPROM only uses the A2 and A1 device addressbits with the third bit being a memory page address bit. Thetwo device address bits must compare to their correspond-ing hard-wired input pins. The A0 pin is no connect.The 8K EEPROM only uses the A2 device address bit withthe next 2 bits being for memory page addressing. The A2bit must compare to its corresponding hard-wired input pin.The A1 and A0 pins are no connect.The 16K does not use any device address bits but insteadthe 3 bits are used for memory page addressing. Thesepage addressing bits on the 4K, 8K and 16K devicesshould be considered the most significant bits of the dataword address which follows. The A0, A1 and A2 pins are noconnect.The eighth bit of the device address is the read/write opera-tion select bit. A read operation is initiated if this bit is highand a write operation is initiated if this bit is low.Upon a compare of the device address, the EEPROM willoutput a zero. If a compare is not made, the chip will returnto a standby state.Write OperationsBYTE WRITE: A write operation requires an 8-bit dataword address following the device address word andacknowledgment. Upon receipt of this address, theEEPROM will again respond with a zero and then clock inthe first 8-bit data word. Following receipt of the 8-bit dataword, the EEPROM will output a zero and the addressingdevice, such as a microcontroller, must terminate the writesequence with a stop condition. At this time the EEPROMenters an internally timed write cycle, tWR, to the nonvolatilememory. All inputs are disabled during this write cycle andthe EEPROM will not respond until the write is complete(refer to Figure 2).PAGE WRITE: The 1K/2K EEPROM is capable of an8-byte page write, and the 4K, 8K and 16K devices arecapable of 16-byte page writes.A page write is initiated the same as a byte write, but themicrocontroller does not send a stop condition after the firstdata word is clocked in. Instead, after the EEPROMacknowledges receipt of the first data word, the microcon-troller can transmit up to seven (1K/2K) or fifteen (4K, 8K,16K) more data words. The EEPROM will respond with azero after each data word received. The microcontrollermust terminate the page write sequence with a stop condi-tion (refer to Figure 3).The data word address lower three (1K/2K) or four (4K, 8K,16K) bits are internally incremented following the receipt ofeach data word. The higher data word address bits are notincremented, retaining the memory page row location.When the word address, internally generated, reaches thepage boundary, the following byte is placed at the begin-ning of the same page. If more than eight (1K/2K) or six-teen (4K, 8K, 16K) data words are transmitted to theEEPROM, the data word address will “roll over” and previ-ous data will be overwritten.ACKNOWLEDGE POLLING: Once the internally timedwrite cycle has started and the EEPROM inputs are dis-abled, acknowledge polling can be initiated. This involvessending a start condition followed by the device addressword. The read/write bit is representative of the operationdesired. Only if the internal write cycle has completed willthe EEPROM respond with a zero allowing the read orwrite sequence to continue.Read OperationsRead operations are initiated the same way as write opera-tions with the exception that the read/write select bit in thedevice address word is set to one. There are three readoperations: current address read, random address readand sequential read.CURRENT ADDRESS READ: The internal data wordaddress counter maintains the last address accessed dur-ing the last read or write operation, incremented by one.This address stays valid between operations as long as thechip power is maintained. The address “roll over” duringread is from the last byte of the last memory page to thefirst byte of the first page. The address “roll over” duringwrite is from the last byte of the current page to the firstbyte of the same page.Once the device address with the read/write select bit setto one is clocked in and acknowledged by the EEPROM,the current address data word is serially clocked out. Themicrocontroller does not respond with an input zero butdoes generate a following stop condition (refer to Figure 4).RANDOM READ: A random read requires a “dummy” bytewrite sequence to load in the data word address. Once thedevice address word and data word address are clocked inand acknowledged by the EEPROM, the microcontrollermust generate another start condition. The microcontrollernow initiates a current address read by sending a deviceaddress with the read/write select bit high. The EEPROMacknowledges the device address and serially clocks out7ntsthe data word. The microcontroller does not respond with azero but does generate a following stop condition (refer toFigure 5).SEQUENTIAL READ: Sequential reads are initiated byeither a current address read or a random address read.After the microcontroller receives a data word, it respondswith an acknowledge. As long as the EEPROM receives anacknowledge, it will continue to increment the data wordaddress and serially clock out sequential data words. Whenthe memory address limit is reached, the data wordaddress will “roll over” and the sequential read will con-tinue. The sequential read operation is terminated whenthe microcontroller does not respond with a zero but doesgenerate a following stop condition (refer to Figure 6).Figure 1. Device AddressFigure 2. Byte WriteFigure 3. Page Write(* = DONT CARE bit for 1K)AT24C01A/02/04/08/168ntsAT24C01A/02/04/08/16Figure 4. Current Address ReadFigure 5. Random Read(* = DONT CARE bit for 1K)Figure 6. Sequential Read9ntsAT24C01A Ordering InformationtWR(max) (ms)ICC(max) (A)ISB(max) (A)fMAX(kHz) Ordering Code Package Operation Range10 3000 18 400 AT24C01A-10PCAT24C01A-10SCAT24C01A-10TC8P38S18TCommercial(0C to 70C)3000 18 400 AT24C01A-10PIAT24C01A-10SIAT24C01A-10TI8P38S18TIndustrial(-40C to 85C)10 1500 4 100 AT24C01A-10PC-2.7AT24C01A-10SC-2.7AT24C01A-10TC-2.78P38S18TCommercial(0C to 70C)1500 4 100 AT24C01A-10PI-2.7AT24C01A-10SI-2.7AT24C01A-10TI-2.78P38S18TIndustrial(-40C to 85C)10 1000 4 100 AT24C01A-10PC-2.5AT24C01A-10SC-2.5AT24C01A-10TC-2.58P38S18TCommercial(0C to 70C)1000 4 100 AT24C01A-10PI-2.5AT24C01A-10SI-2.5AT24C01A-10TI-2.58P38S18TIndustrial(-40C to 85C)10 800 3 100 AT24C01A-10PC-1.8AT24C01A-10SC-1.8AT24C01A-10TC-1.88P38S18TCommercial(0C to 70C)800 3 100 AT24C01A-10PI-1.8AT24C01A-10SI-1.8AT24C01A-10TI-1.88P38S18TIndustrial(-40C to 85C)Package Type8P3 8-pin, 0.300 Wide, Plastic Dual Inline Package (PDIP)8S1 8-lead, 0.150 Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)8T 8-lead, 0.170 Wide, Thin Shrink Small Outline Package (TSSOP)OptionsBlank Standard Operation (4.5V to 5.5V)-2.7 Low-voltage (2.7V to 5.5V)-2.5 Low-voltage (2.5V to 5.5V)-1.8 Low-voltage (1.8V to 5.5V)AT24C01A/02/04/08/1610ntsAT24C01A/02/04/08/16AT24C02 Ordering InformationtWR(max) (ms)ICC(max) (A)ISB(max) (A)fMAX(kHz) Ordering Code Package Operation Range10 3000 18 400 AT24C02-10PCAT24C02N-10SCAT24C02-10TC8P38S18TCommercial(0C to 70C)3000 18 400 AT24C02-10PIAT24C02N-10SIAT24C02-10TI8P38S18TIndustrial(-40C to 85C)10 1500 4 100 AT24C02-10PC-2.7AT24C02N-10SC-2.78P38S1Commercial(0C to 70C)AT24C02-10TC-2.7 8T1500 4 100 AT24C02-10PI-2.7AT24C02N-10SI-2.7AT24C02-10TI-2.78P38S18TIndustrial(-40C to 85C)10 1000 4 100 AT24C02-10PC-2.5AT24C02N-10SC-2.5AT24C02-10TC-2.58P38S18TCommercial(0C to 70C)1000 4 100 AT24C02-10PI-2.5AT24C02N-10SI-2.5AT24C02-10TI-2.58P38S18TIndustrial(-40C to 85C)10 800 3 100 AT24C02-10PC-1.8AT24C02N-10SC-1.8AT24C02-10TC-1.88P38S18TCommercial(0C to 70C)800 3 100 AT24C02-10PI-1.8AT24C02N-10SI-1.8AT24C02-10TI-1.88P38S18TIndustrial(-40C to 85C)Package Type8P3 8-pin, 0.300 Wide, Plastic Dual Inline Package (PDIP)8S1 8-lead, 0.150 Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)8T 8-le