isa总线标准定义.doc

isa总线标准定义作者：佚名来源：不详点击数： 1050更新时间：2008年01月08日isa总线标准ISA 是 Industry Standard Architecture 的缩写 ISA插槽是基于ISA总线（Industrial Standard Architecture，工业标准结构总线）的扩展插槽，其颜色一般为黑色，比PCI接口插槽要长些，位于主板的最下端。其工作频率为8MHz左右，为16位插槽，最大传输率16MB/sec，可插接显卡，声卡，网卡已及所谓的多功能接口卡等扩展插卡。其缺点是CPU资源占用太高，数据传输带宽太小，是已经被淘汰的插槽接口。ISA 是8/16bit 的系统总线，最大传输速率仅为8MB/s ，但允许多个CPU 共享系统资源。由于兼容性好，它在上个世纪80年代是最广泛采用的系统总线，不过它的弱点也是显而易见的，比如传输速率过低、CPU占用率高、占用硬件中断资源等。后来在PC98 规范中，就开始放弃了ISA 总线，而Intel 从i810 芯片组开始，也不再提供对ISA 接口的支持。ISA总线扩展插槽由两部分组成，一部分有62引脚，其信号分布及名称与PC/XT总线的扩展槽基本相同，仅有很小的差异。另一部分是AT机的添加部分，由36引脚组成。这36引脚分成两列，分别称为C列和D列。 isa接口卡的外观isa插槽的外观ISA接口引脚定义引脚定义方向说明A1/I/O CH CKI/O channel check; active low=parity errorA2D7Data bit 7A3D6Data bit 6A4D5Data bit 5A5D4Data bit 4A6D3Data bit 3A7D2Data bit 2A8D1Data bit 1A9D0Data bit 0A10I/O CH RDYI/O Channel ready, pulled low to lengthen memory cyclesA11AENAddress enable; active high when DMA controls busA12A19Address bit 19A13A18Address bit 18A14A17Address bit 17A15A16Address bit 16A16A15Address bit 15A17A14Address bit 14A18A13Address bit 13A19A12Address bit 12A20A11Address bit 11A21A10Address bit 10A22A9Address bit 9A23A8Address bit 8A24A7Address bit 7A25A6Address bit 6A26A5Address bit 5A27A4Address bit 4A28A3Address bit 3A29A2Address bit 2A30A1Address bit 1A31A0Address bit 0B1GNDGroundB2RESETActive high to reset or initialize system logicB3+5V+5 VDCB4IRQ2Interrupt Request 2B5-5VDC-5 VDCB6DRQ2DMA Request 2B7-12VDC-12 VDCB8/NOWSNo WaitStateB9+12VDC+12 VDCB10GNDGroundB11/SMEMWSystem Memory WriteB12/SMEMRSystem Memory ReadB13/IOWI/O WriteB14/IORI/O ReadB15/DACK3DMA Acknowledge 3B16DRQ3DMA Request 3B17/DACK1DMA Acknowledge 1B18DRQ1DMA Request 1B19/REFRESHRefreshB20CLOCKSystem Clock (67 ns, 8-8.33 MHz, 50% duty cycle)B21IRQ7Interrupt Request 7B22IRQ6Interrupt Request 6B23IRQ5Interrupt Request 5B24IRQ4Interrupt Request 4B25IRQ3Interrupt Request 3B26/DACK2DMA Acknowledge 2B27T/CTerminal count; pulses high when DMA term. count reachedB28ALEAddress Latch EnableB29+5V+5 VDCB30OSCHigh-speed Clock (70 ns, 14.31818 MHz, 50% duty cycle) B31GNDGroundC1SBHESystem bus high enable (data available on SD8-15)C2LA23Address bit 23C3LA22Address bit 22C4LA21Address bit 21C5LA20Address bit 20C6LA18Address bit 19C7LA17Address bit 18C8LA16Address bit 17C9/MEMRMemory Read (Active on all memory read cycles)C10/MEMWMemory Write (Active on all memory write cycles)C11SD08Data bit 8C12SD09Data bit 9C13SD10Data bit 10C14SD11Data bit 11C15SD12Data bit 12C16SD13Data bit 13C17SD14Data bit 14C18SD15Data bit 15D1/MEMCS16Memory 16-bit chip select (1 wait, 16-bit memory cycle)D2/IOCS16I/O 16-bit chip select (1 wait, 16-bit I/O cycle)D3IRQ10Interrupt Request 10D4IRQ11Interrupt Request 11D5IRQ12Interrupt Request 12D6IRQ15Interrupt Request 15D7IRQ14Interrupt Request 14D8/DACK0DMA Acknowledge 0D9DRQ0DMA Request 0D10/DACK5DMA Acknowledge 5D11DRQ5DMA Request 5D12/DACK6DM