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112233445566D DC CB BA ATitleNumber RevisionSizeBDate: 2010-9-25 Sheet ofFile: C:Documents and Settings.THB6064 .SchDrawn By:ALERT1SGND2OSC13FTD4VREF5VMB6M17M28M39OUT_2B10NFB11OUT_1B12PGND13OUT_2A14NFA15OUT_1A16PGND17EN18RESET19VMA20CLK21CW/CWW22OSC123VDD24DOWN25U5THB6064H1234 5678U3253012 34U2P521R3330R2330R1330R92K7R82K7R71KC14471C13471C3104C9470UC1147UC1247UC10220UVCCVCCVCCVMCP+CP+CP-CP-UD+UD+UD-UD-EN+EN+EN-EN- VMGNDCLKENCWOUT1AOUT2AOUT2BOUT1BC2104C1104VCCVCCVCCVCCVMR240.27R230.27R115K PFDPFDCWENCLKRESRESDOWDOWVREFVREFOUT1AOUT2AOUT1BOUT2BNFANFBR2291KC15474123654S1 R1310KR1410KR2110KM1M2M3M1M2M3R124K7D3REDD2GREC16471C17471R202K7R185KR15470R19470VCCC7104C8104C4104C5104C6104VMVCCC18104C19104ERRGNDVM12J112J212J312J412J512J612J7Vin3ADJ1+Vout2U1LM317TR51KR42K7P0C101 P0C102 P0C201 P0C202 P0C301 P0C302 P0C401 P0C402 P0C501 P0C502 P0C601 P0C602 P0C701 P0C702 P0C801 P0C802 P0C901 P0C902 P0C1001 P0C1002 P0C1101 P0C1102 P0C1201 P0C1202 P0C1301 P0C1302 P0C1401 P0C1402 P0C1501 P0C1502 P0C1601 P0C1602 P0C1701 P0C1702 P0C1801 P0C1802 P0C1901 P0C1902 P0D201 P0D202 P0D301 P0D302 P0J101 P0J102 P0J201 P0J202 P0J301 P0J302 P0J401 P0J402 P0J501 P0J502 P0J601 P0J602 P0J701 P0J702 P0R101 P0R102 P0R201 P0R202 P0R301 P0R302 P0R401 P0R402 P0R501 P0R502 P0R701 P0R702 P0R801 P0R802 P0R901 P0R902 P0R1101 P0R1102 P0R1103 P0R1201 P0R1202 P0R1301 P0R1302 P0R1401 P0R1402 P0R1501 P0R1502 P0R1801 P0R1802 P0R1803 P0R1901 P0R1902 P0R2001 P0R2002 P0R2101 P0R2102 P0R2201 P0R2202 P0R2301 P0R2302 P0R2401 P0R2402 P0S101 P0S102 P0S103 P0S104 P0S105 P0S106 P0U101 P0U102 P0U103 P0U201 P0U202 P0U203 P0U204 P0U301 P0U302 P0U303 P0U304 P0U305 P0U306 P0U307 P0U308 P0U501 P0U502 P0U503 P0U504 P0U505 P0U506 P0U507 P0U508 P0U509 P0U5010 P0U5011 P0U5012 P0U5013 P0U5014 P0U5015 P0U5016 P0U5017 P0U5018 P0U5019 P0U5020 P0U5021 P0U5022 P0U5023 P0U5024 P0U5025 THB6064H THB6064H PWM Chopper-Type bipolar Stepping Motor Driver IC 2008-08-24 1 V2.1.10 THB6064H The THB6064H is a PWM chopper-type sinusoidal micro-step bipolar stepping motor driver IC. It supports 8 kind of excitation modes and forward/reverse mode and is capable of low-vibration, high-performance drive of 2-phase bipolar type stepping motors using only a clock signal. Features Single-chip bipolar sinusoidal micro-step stepping motor driver Weight: HZIP25-P-1.27: 9.86 g (typ.) Uses high withstand voltage BiCD process: Ron (upper lower) = 0.4 (typ.) Forward and reverse rotation control available Selectable phase drive (1/2,1/8,1/10, 1/16, 1/20, 1/32, 1/40, 1/64 step) High output withstand voltage: VDSS = 50 V High output current: IOUT= 4.5 A (peak) Packages: HZIP25-P-1.27 Output monitor pins (DOWN / ALERT) Equipped with reset and enable pins Built-in thermal shutdown(TSD) and over-current detection(ISD) circuit *: Since this product has a MOS structure, it is sensitive to electrostatic discharge. These ICs are highly sensitive to electrostatic discharge. When handling them, please be careful of electrostatic discharge, temperature and humidity conditions. 2. Use of Sn-3.0Ag-0.5Cu solder bath *solder bath temperature = 245C *dipping time = 5 seconds *the number of times = once *use of R-type flux 1. Use of Sn-37Pb solder bath *solder bath temperature = 230C *dipping time = 5 seconds *number of times = once *use of R-type flux The THB6064H is a Sn-Ag plated product including Pb. The following conditions apply to solderability: *Solderability THB6064H Block Diagram M1M2CW/CCWCLKM3 Input circuit VDD1/3 TSD / ISD DOWN ALERT H-Bridge driver A VMAOUT1A OUT2A NFAVMBH-Bridge driver B OUT1B OUT2B NFBVrefSGND PGNDACurrent selectorcircuit A 5 4 12 6 15 14 16 20 1 25 24 7 8 9 22 21 19 18 17 2 FDT Current selectorcircuit B Pre-drivePre-drive11 10 RESETOSC2 ENABLEPGNDB2008-08-24 2 V2.1.10 13 OSC1A OSC1B OSC1A OSC1B 23 3 THB6064H 2008-08-24 3 V2.1.10 Pin Functions Pin No. I/O Symbol Functional Description Remark 1 Output ALERT TSD / ISD monitor pin 2 SGND Signal ground 3 OSC1B B channel Capacitor connection pin for off-time setting 4 Input FDT Voltage input pin for mixed decay ratio setting 5 Input VrefVoltage input for 100% current level 6 Input VMBMotor power supply pin for B channel 7 Input M1 Excitation mode setting input pin Built-in pull-down resistor 8 Input M2 Excitation mode setting input pin Built-in pull-down resistor 9 Input M3 Excitation mode setting input pin Built-in pull-down resistor 10 Output OUT2B B channel output 2 11 NFBB channel output current detection pin Connect external resistor 12 Output OUT1BB channel output 1 13 PGNDBPower ground 14 Output OUT2AA channel output 2 15 NFAB channel output current detection pin Connect external resistor 16 Output OUT1AA channel output 1 17 PGNDAPower ground 18 Input ENABLE Enable signal input pin H: Enable, L: all output off 19 Input RESET Reset signal input pin 20 Input VMAMotor power supply pin for A channel 21 Input CLK CLK pulse input pin 22 Input CW/CCW Forward/reverse control pin L: Forward, H: reverse 23 OSC1A A channel Capacitor connection pin for off-time setting 24 Input VDDControl side power pin. 25 Output DOWN CLK frequency monitor pin Input pins (M1, M2, M3, CLK, CW/CCW, ENABLE and RESET) Output pins (DOWN, ALERT) VDD100 k100 THB6064H 2008-08-24 4 V2.1.10 Absolute Maximum Ratings (Ta = 25C) Characteristic Symbol Rating Unit VDD6 Power supply voltage VMA/BB 50 V Output current IO (PEAK)4.5(Note 1) A/phaseI TSDDrain current (TSD, DOWN) I DOWN1 mA Input voltage VIN5.5V 5 (Note 2)Power dissipation PD43 (Note 3)W Operating temperature Topr30 to 85 C Storage temperature Tstg55 to 150 C Note 1: T = 100ms Note 2: Ta = 25C, No heat sink. Note 3: Ta = 25C, with infinite heat sink (HZIP25). Operating Range (Ta = 30 to 85C) Characteristic Symbol Test Condition Min Typ. Max UnitVDD 4.5 5.0 5.5 V Power supply voltage VMA/B VMA/B VDD 4.5 42 V Output current IOUT 4 A VIN 0 5.5 Input voltage Vref .5 3 V Clock frequency fCLK 100 kHzOSC frequency fOSC 100 kHzTHB6064H Electrical Characteristics (Ta = 25C, VDD= 5 V, VM= 24 V) Control circuit Characteristic Symbol Test Condition Min Typ. Max UnitHigh VIN (H)2.0 VDDInput voltage Low VIN (L)0.2 0.8 V Input hysteresis voltage VHM1, M2, M3, CW/CCW, CLK, RESET, ENABLE 400 mV IIN (H)M1, M2, M3, CW/CCW, CLK, RESET, ENABLE VIN= 5.0 V 55 (80) Input current IIN (L)VIN= 0 V 1 A IDD1Output open, RESET: H, ENABLE: H M1:L, M2:L, M3:L (1/2-step mode) 3 (7) IDD2RESET: L, ENABLE: H 2 (7) VDD supply current IDD3RESET: L, ENABLE: L 2 (7) mA IM1RESET: H/L, ENABLE: L 0.5 VMsupply current IM2RESET: H/L, ENABLE: H 1 mA Input current IIN(ref)Vref=3.0V A Vref input circuit Divider ratio Vref/VNFMaximum current : 100% 3 Input current IIN(FDT) A Slow decay mode 3.5 VDDMixed decay mode(Peak voltage) (2.9) 3.1 (3.3) Mixed decay mode(Bottom voltage) (0.9) 1.1 (1.3) Mixed-decay comparator Input voltage range VFDTFast decay mode 0.8 V Minimum CLK pulse width tW (CLK) 10 s VOLDOWN Output residual voltage VOLALERT IOL= 1 mA 0.5 V TSD operation temperature(Note) TSD (Design target value) 170 C TSD hysteresis (Note) TSDhys (Design target value) 40 C Off time（ Note） TOFF1A, TOFF1BCOSC1A,COSC1B= 1000pF (Design target value) 16 23 35 secOscillation circuit for CLK monitor Detection CLK frequency fdetect using built-in capacitor (0.75) 1.5 (3.0) Hz Note: Pre-shipment testing is not performed. Output Block Characteristic Symbol Test Condition Min Typ. Max UnitOutput ON resistor RonH + RonLIOUT= 4 A 0.4 (0.6) tr 0.1 Output transistor switching characteristics tfRL= 2 , VNF= 0 V, CL= 15 pF 0.1 s Upper side ILH 1 Output leakage current Lower side ILLVM= 50 V 1 A 2008-08-24 V2.1.10 5THB6064H Description of Functions 1. Excitation Settings You can use the M1, M2 and M3 pin settings to configure four different excitation settings. (The default is 2-phase excitation using the internal pull-down.) Please be sure to set up Low or High always at M1, M2 and M3 terminals. Although M1、 M2 and M3 terminals have built-in pull-down resistors, please do not keep M1、 M2 and M3 terminals open. Input M1 M2 M3 Mode (Excitation) L L L 1/2 L L H 1/8 L H L 1/10 L H H 1/16 H L L 1/20 H L H 1/32 H H L 1/40 H H H 1/64 2. Function When the ENABLE signal goes Low level, it sets an OFF on the output. The output changes to the Initial mode shown in the table below when the RESET signal goes Low level. In this mode, the status of the CLK and CW/CCW pins are irrelevant. X: Dont care Input CLK CW/CCW RESET ENABLE Output Mode L H H CW H H H CCW X X L 2008-08-24 6 V2.1.10 3. Initial Mode When RESET is used, the phase currents are as follows. Excitation Mode A Phase Current B Phase Current1/2 step 100% 0% 1/8 step 100% 0% 1/10 step 100% 0% 1/16 step 100% 0% 1/20 step 100% 0% 1/32 step 100% 0% 1/40 step 100% 0% 1/64 step 100% 0% H Initial mode X X X L Z THB6064H 4. OSC circuit Oscillating waveform of chopping wave is generated by connecting the capacitor (COSC1A and COSC1B) between OSC1A , OSC1B and GND terminal. The fixed off-time (TOFF1Aand TOFF1B) can be calculated by the following equation: BTOFF1A COSC1A ( 4.4 10-5 ) sec TOFF1B CBOSC1B ( 4.4 10 ) sec -5 (A gap is between actual values because this is an approximate expression.) The recommended value for TOFF1Aand TOFF1Bis from 15s to 35 s. BThe recommended value for COSC1A and COSC1Bis from 680pF to 1000pF. B2* 2008-08-24 7 V2.1.10 3 1V (typ.) 1.1V (typ.) 1* V V *) t1*：t2* 30:1 5. Decay mode By comparing the input voltage of FDT terminal and the OSC chopping wave, the rate of the fast-decay time and the slow-decay time in the mixed-decay mode can be set up. VFDTV Decay mode 3.5 VFDT VDDSlow decay 1.1 VFDT 3.1 Mixed-decay 0 VFDT 0.8 Fast decay THB6064H 1) Mixed-decay When FDT is from 1.1V to 3.1V, it moves to the mixed-decay mode. PWM turns on and the coil current increases in synchronizing with the timing of the peak voltage of Vosc. When the coil current reaches the setup current, PWM turns off and it moves to the slow-decay mode. And the coil current decreases. After that, it switches from the slow-decay mode to the fast-decay mode in the timing that Vosc reaches VFDT and the motor current decreases. Then, in the timing that Vosc reaches peak voltage, PWM turns on again and the coil current increases. There is reverse-current protection in fast decay mode by zore-detection. 2) Fast-decay When VFDT is less than 0.8V, it moves to the fast-decay mode. When the coil current reaches set up value, it moves to the fastdecay mode and the coil current decreases. In synchronizing with the peak voltage of Vosc, PWM turns on and the coil current increases. There is reverse-current protection in fast decay mode by zore-detection. 1.1V (Typ.) 3.1V (Typ.) VOSCV Coil current A Ipeak A Slow decay Slow decay VFDTV Fast decay Fast decay Fixed off-time Fixed off-time 1.1V (Typ.) 3.1V (Typ.) VOSCV Coil current A Ipeak A Fast Fast decay decay VFDTV 0.8V 2008-08-24 V2.1.10 8THB6064H 3) Slow-decay When VFDT is more than 3.5V, it moves to the slow-decay mode. When the coil current reaches set up value, it moves to the slowdecay mode and the coil current decreases. In synchronizing with the peak voltage of Vosc, PWM turns on and the coil current increases. VFDTV 3.5V 2008-08-24 9 V2.1.10 1.1V (Typ.) VOSCV Coil current A Slow decay Slow decay 3.1V (Typ.) Ipeak A 6. 100% current Settings (Current Value) 100% current value is determined by Vref inputted from external part and the external resistance for detecting output current. Vref is doubled 1/3 inside IC, and compared with VRS. Io(100%) = Vref x 1/3 x 1/Rs The average current is lower than the calculated value because this IC has the method of peak current detection. THB6064H 7. Thermal Shut-Down circuit The IC incorporates a thermal shutdown circuit. When the junction temperature (Tj) reaches 170C (typ.), the output power MOSFETs are turned off. The output power MOSFETs are turned on automatically. The IC has 40C of temperature hysteresis. TSD = 170C (target spec) (Note) TSD = 40C (target spec) (Note) 170C (typ.) 2008-08-24 10 V2.1.10 130C (typ.) Note: Pre-shipment testing is not performed. 8. ISD (Over current detection) Current that flow through output power MOSFETs are monitored individually. If over-current is detected in at least one of all output power MOSFETs, all output power MOSFETs are turned off then this status is kept until ENABLE signal is input. Target value in design is 6A and dispersion of 1.5A should be considered. ISD = 6A (typ.) 1.5A (Note) Note: Pre-shipment testing is not performed. Junction temperatureALERT output TSD H L 6.0A (typ.) Output power MOSFET drain current ALERT output H L Insensitive Period (3us(typ.) ENABLE input Output :off 0.15ms(min.)Output :on H L THB6064H 9. Low voltage detection (UVLO) circuit Outputs are shutoff by operating at 3.9V (Typ.) of VDDor less. It has a hysteresis of 0.1V(Typ.) and recover to output when VDDreaches 4.0V(Typ.). The state of internal IC when the ULVO circuit is driving The states of the internal IC, outputs, and the IC after recovery correspond to the enable mode. 10. ALERT output ALERT pin outputs the state of TSD and ISD. When TSD or ISD circuit operates, ALERT pin state changes from high impedance to low. VALERT= 0.5V (max.) at 1mA TSD ISD ALERT pin Under TSD opeartionOpen-drain connectionUnder ISD opeartionNormal Under ISD operation2008-08-24 11 V2.1.10 Under TSD opeartion Normal Low Normal Normal Z 11. DOWN When IC detects CLK frequency less than 1.5Hz, output of DOWN pin turns to LOW. Pin State DOWN Low fCLK 1.5Hz Z fCLK 1.5Hz THB6064H 2008-08-24 12 V2.1.10 Relationship between Enable, RESET and Output (OUT) Ex-1: ENABLE 1/2-step mode(M1: L, M2: L, M3: L) The ENABLE signal at Low level disables only the output signals. Internal logic functions proceed in accordance with input clock signals and without regard to the ENABLE signal. Therefore output current is initiated by the timing of the internal logic circuit after release of disable mode. Ex-2: RESET 1/2-step mode (M1: L, M2: L, M3: L) When the RESET signal goes Low level, output goes Initial state (Initial state: A Channel output current is 100%). Once the RESET signal returns to High level, output continues from the next state after Initial from the next raise in the Clock signal. CLK ENABLE RESET100 (%) 0 100 t0t1t2t3t7t8t9t10t11t12OFF 71 71 IACW CLKENABLERESET 100(%)0100t0t1t2t3t7t8t4t5t2t37171t6IACW THB6064H Sequences of output waveform IA/IBat each excitation mode B1/2-step Excitation Mode (M1: L, M2: L, M3: L, CW Mode) CLK 100 (%) 0 100 t0t1t2t3t7t8t4t5t671 71 IA100 (%) 0 100 71 71 IB1/2-step Excitation Mode (M1: L, M2: L, M3: L, CCW Mode) CLK100(%)0100t0t1t2t3t7t8t4t5t67171IA100(%)01007171IB2008-08-24 V2.1.10 13THB6064H 1/8-Step Excitation Mode (M1: H, M2: L, M3: H, CW Mode) CLK t0t1t2t3t7t8t4t5t12t13t6100 (%) 98 92 83 71 56 38 20 0 20 38 56 71 92 98 100 100 (%) 98 92 83 71 56 20 0 20 38 56 71 98 100 t9t10t11t14t17t18t15t16t19t20t21t22t27t28t24t25t29t30t31t32t23t26IAIBB2008-08-24 V2.1.10 14THB6064H 1/8-Step Excitation Mode (M1: H, M2: L, M3: H, CCW Mode) CLK 100 (%) 98 92 83 71 56 38 20 0 20 38 56 71 92 98 100 100 (%) 98 92 83 71 56 20 0 20 38 56 71 98 100 t0t1t2t3t7t8t4t5t12t13t6t9t10t11t14t17t18t15t16t19t20t21t22t27t28t24t25t29t30t31t32t23t26IAIB2008-08-24 V2.1.10 15THB6064H 1/10-step Excitation Mode (M1: L, M2: H, M3: L, CW Mode) 2008-08-24 16 V2.1.10 -100-80-60-40-200 20 40 60 80 100%CLKt0t40 IAIBBTHB6064H 1/10-step Excitation Mode (M1: L, M2: H, M3: L, CCW Mode) CLK2008-08-24 17 V2.1.10 t0t40 -100100%-80-60-40-200 20 40 60 80 IAIBBTHB6064H 1/16-step Excitation Mode (M1: L, M2: H, M3: H, CW Mode) 2008-08-24 18 V2.1.10 CLK%981009296838877716356473829201010202938475663717783921009809688t0t64IAIBBTHB6064H 1/16-step Excitation Mode (M1: L, M2: H, M3: H, CCW Mode) 2008-08-24 19 V2.1.10 CLK%981009296838877716356473829201010202938475663717783921009809688t0t64IAIBBTHB6064H 1/20-step Excitation Mode (M1: H, M2: L, M3: L, CW Mode) -100-80-60-40-200 20406080100IA%CLKt0t80IB2008-08-24 V2.1.10 20THB6064H 1/20-step Excitation Mode (M1: H, M2: L, M3: L, CCW Mode) -100-80-60-40-200 20406080100IAIB%CLKt0t802008-08-24 V2.1.10 21THB6064H 1/32-step Excitation Mode (M1: H, M2: L, M3: H, CW Mode) CLKCurrent level%EnlargedIAIB Enlarged below 100080206040CLK% 100806040202008-08-24 V2.1.10 22THB6064H 1/32-step Excitation Mode (M1: H, M2: L, M3: H, CCW Mode) CLKCurrent level%EnlargedIAIB Enlarged below 100080206040CLK%100806040202008-08-24 V2.1.10 23THB6064H 1/40-step Excitation Mode (M1: H, M2: H, M3: L, CW Mode) -100-80-60-40-20020406080100 CLKEnlarged below IAIBBCLKCurrent level%Enlarged2008-08-24 V2.1.10 24THB6064H 1/40-step Excitation Mode (M1: H, M2: H, M3: L, CCW Mode) -100-80-60-40-20020406080100 CLKEnlarged below IAIBCLKCurrent level%Enlarged2008-08-24 V2.1.10 25THB6064H 1/64-step Excitation Mode (M1: H, M2: H, M3: H, CW Mode) -100-80-60-40-20020406080100 Enlarged below CLK%IAIBBt0t256 CLKCurrent level%Enlarged2008-08-24 V2.1.10 26THB6064H 1/64-step Excitation Mode (M1: H, M2: H, M3: H, CCW Mode)-100-80-60-40-200 20406080100CLK Enlarged below CLKCurrent level%Enlarged%IAIBt0t256 2008-08-24 V2.1.10 27THB6064H Current level 64 40 - 100.00 - 30 - 63.2 67.16 71.263 39 96.0 99.97 100.0 29 18 61.3 65.32 69.362 - 95.9 99.88 100.0 28 - 59.4 63.44 67.461 38 95.7 99.73 100.0 27 17 57.5 61.52 65.560 - 95.5 99.52 100.0 26 - 55.6 59.57 63.659 37 95.2 99.25 100.0 - 16 54.8 58.78 62.858 36 94.9 98.92 100.0 25 - 53.6 57.58 61.657 - 94.5 98.53 100.0 24 15 51.6 55.56 59.656 35 94.1 98.08 100.0 23 - 49.5 53.50 57.555 - 93.6 97.57 100.0 - 14 48.2 52.25 56.254 34 93.0 97.00 100.0 22 - 47.4 51.41 55.453 33 92.4 96.38 100.0 21 13 45.3 49.29 53.352 - 91.7 95.69 99.7 20 - 43.1 47.14 51.151 32 91.0 94.95 99.0 19 12 41.0 44.96