JX428-五轴雕刻机机电结构设计【CAD图纸+三维建模+文档】
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JX428-五轴雕刻机机电结构设计【CAD图纸+三维建模+文档】,CAD图纸+三维建模+文档,JX428,雕刻,机电,结构设计,CAD,图纸,三维,建模,文档
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54 R60 R33.5 4X4 3X5 200 R2.5 69 90 48 54 60 R45 60 AA 15 剖面 A-A 比例 1 : 2硬质PVC板比例1：2共 张 第 张淮阴工学院摆臂其余 技术要求：1.去除毛刺飞边；2.零件加工表面上，不应有划痕、擦伤等损伤零件表面的缺陷。设计校核审核班级学号赵俊机自10871081101738日期6.3 110 50 230 220 4X4 AA 25 26 +0.0530.020 28 +0.0530.020 剖面 A-A 比例 1 : 2硬质PVC板比例1：2共 张 第 张淮阴工学院支架其余 技术要求：1.去除毛刺飞边；2.零件加工表面上，不应有划痕、擦伤等损伤零件表面的缺陷。设计校核审核班级学号赵俊机自10871081101738日期6.3 15 25 28 39 6 10 +0.0350.013 12 +0.0430.016 18 16 60 1.61.6 4X4 48 设计校核审核班级学号赵俊机自10871081101738日期45比例1.5：1共 张 第 张淮阴工学院法兰盘其余 技术要求1.去除毛刺飞边；2.零件加工表面上，不应有划痕、擦伤等损伤零件表面的缺陷6.3 400 200 R60 440 505 230 20 26f8 10K6 28f8 12K6 2143791013145681112序号图号（代号）名称数量材料底板142步进涡轮电机1垫块1支架212345678910111213法兰盘2加强板1摆臂242步进电机直线导轨11226深沟球轴承1硬质PVC板硬质PVC板硬质PVC板45钢硬质PVC板铝合金HG01JSX300HG03HG04HG05HG06HG07JSZ300HM-42080642BYG250BII60011：3淮阴工学院五轴雕刻机 技术要求：1.零件在装配前必须清理和清洗干净，不得有毛刺、飞边、切屑、油污、着色剂和灰尘等；2.装配前应对零、部件的主要配合尺寸，特别是过盈配合尺寸及相关精度进行复查。赵俊HG22硬质PVC板铝合金型材14步进直线滑台深沟球轴承60001SGMJV-01AAA611560交流伺服平移台步进旋转台标记处数分区更改文件号签名年、月、日设计标准化审核工艺批准阶段标记质量 比例共张张第校对审定Proceedingsofthe 2009 IEEEInternational Conference on Mechatronics and AutomationAugust 9 - 12, Changchun, ChinaDesignofSoftware Architecture for NCEngraving Machine Based on Embedded LinuxJunqi ZhaoInstituteofAstronauticsandAeronauticsUniversityofElectronic ScienceandTechnologyofChinaChengdu, Sichuan Province 610054, Chinazhao-junqiAbstract -Embeddedsystem hasalready beenappliedwidely inindustrycontrolandmanyotherfields. As the sizeandcomplexity of embedded applicationsystemincreasing, theembeddedsoftwaresystemisbecomingmoreandmorecomplexity.Itisespeciallyimportanttodesignsuitableembedded softwarearchitecturefor a special control object. Atthesametime,variousfunctionalandnon-functionalrequirements of NC (numerical control) engravingaredemandedcontinually. At present, most of the software architectures forNC engraving machinearewithout operating systemsupportandnotbeabletomeetthoserequirements.Althoughafewengraving control system with commercial operating systemsupport, it is expensiveandnot good for enterprise developingsoftware with independent intellectualpropertyrights. Inorderto solve the above problems, the new softwarearchitectureforNC engraving machine was designed based on embedded LinuxandDARTS method in thispaper.The systemdataflow wasanalyzed bydataflow diagram,andthen the system was dividedinto various tasks by the HGommaprinciple.Furthermore,thesoftwarearchitecturewasputforward.Theinter-tasksynchronizationandcommunication was also analyzed. Finally,thereal timeanalysiswasmade.Byusingthissoftwarearchitecture, the software system become simpleandclear,anddifferent control component based on different time granularitiescan beintegratedseamlessly.Throughpractical application, itwas proventhatvarious requirements of NC engraving systemcan be realized with low cost. The flexibilityandadaptability ofthe systemarealso improved greatly.Index Terms - ARM. Embedded Linux. Engraving. FPGA.Software Architecture.1.INTRODUCTIONAs the size and complexityofembedded software systemincreasing,the importanceofsoftwarearchitecturegoesbeyond the algorithms and data structuresofthe computation.Designing and specifying the overall system structure emergesas a new kind of problem 1. A good architecture can helpensure that a system will satisfy key requirements in suchareas as performance, reliability, portability, scalability, andinteroperability.Abadarchitecturecanbedisastrous.Architecture design is high-level design for overall systemfrom the system pointofview. Different experts will definesoftware architecture on their own. After all, it is a tool tosolve practical problems in various domains and contexts, thusvarious architectural models or definitions have been released.Although various definitions are somewhat different, we canHui Li and Longfei PengInstituteofAstronauticsandAeronauticsUniversityofElectronic ScienceandTechnologyofChinaChengdu, Sichuan Province 610054, Csee a large degreeofcommonality at the coreofallofthemwitch is the notion that the architecture of a system describesits gross structure. This structure illuminates the top leveldesign decisions, including things such as how the system iscomposedofinteracting parts, where are the main pathwaysofinteraction, what are the key properties of the parts. The keystepofarchitecture design is to divide system into somemanageable subsystems and design interfaces between thesubsystems. Software architecture design should not onlyconsider how to meet the systems functional and performancerequirements, but also the non-function, such as reliability,scalability, portability and availability. There is not a unifiedapproach for software architecture, especially in the embeddedsystem.Embedded Linux is referred to tailor standard Linuxthrough the miniaturization treatment and can be stored onnon-volatile storage or microcontroller which capacity is onlya few hundred KB or a few MB.Itis a special Linuxoperating system that is applied to special embedded system2. Linux has emerged as a mature, high-performance, stableand reliable alternative to traditional proprietary embeddedoperatingsystem3.Linuxnotonlypossessestheadaptability, flexibility, and stability but also possesses strongnetwork functions. Moreover Linux is a sortoffree softwarewith open source codes 4.At present, most of the software architectures for NCengraving machine are without operating system support andnot be able to meet various requirements. Those architectureshave a simple structure, but the software development cycle islong, the development cost is expensive, the software qualityis not guaranteed as well as the portability and scalability ispoor. Although a few with commercial embedded operatingsystem such as Windows CE in NC engraving system, the costofproduction is high due to expensive royalties. So, it is notgood for enterprise developing software with independentintellectualpropertyrights.ButifanembeddedLinuxoperating system with open source is used, cost of productioncan be reduced because no licensing fee is needed and thecross development tool chain is also free. In addition, there aremany other advantages such as reduced development timebecauseofopensourcedevicedriversandreusableapplications,convenientdevelopmentenvironmentconfiguration using module function, file system managementandeasyresolutionofaproblemfromopensourcecommunities and so on 5. On the basisofabove, enterprises978-1-4244-2693-5/09/$25.00 2009 IEEE2894can developNCsoftwarewithindependentintellectualproperty rights and other various requirements can also besatisfied. Embedded Linux has recently become a currentresearch focus in embedded system.II.MODELOFHARDWAREModel is the abstractionofreality which can make cleardescriptionofthe reality. In order to get the engraving controlsystem model, the main hardware partsofthe system areabstracted as shown in Fig.I.Fig. ) ModelofhardwareThe hardware of the NC engraving controller is providedwith the architectureofARM and FPGA (Field ProgrammableGate Array). The master control chipofthe controller adopts32-bit RISC(ReducedInstructionSet Computer)ARMmicroprocessor chip S3C2440 of Samsung Company whichbased on ARM920T structure. It has high work efficiency upto 400MHz and many kindsofgeneral interfaces, such asintegrated UART for serial port, integrated USB, CEMERA,LCD, VGA and Ethernet controllers etc. Furthermore, itprovides on chip memory manage unit (MMU) which is usedto realize virtual memory management, so as Linux can beeasily ported to ARM.The Cyclone FPGAEPlC6of Altera Company wasadopted as the slave chip to lighten the burdenofthe mastercontrol chip. NAND Flash memory is used for non-volatileprogram and data storage. Main memory is synchronousdynamic random-access memory (SDRAM) and might containanywhere from a few megabytes to hundredsofmegabytesdepending on the application. The main processing flowofthesystem is described as follow: keying informationofcontrolpanel is sent to ARM through serial port. ARM then processand send the corresponding control data to FPGA or displaypanel. FPGA is mainly doing front-end processing work ofsensor and control information 6. The signals sent by FPGAare transformed and isolated by the adapter panel, and then aresent to the driver which will drive the stepping motoroftheengraving machine so as to control the cutting tool path. Torealize the functionsofhomingof engravingand toolchanging, the sensor signal of engraving machine will be feedback to FPGA through adapter panel. Information is displayedon display panel which is LCD or VGA.In all, the controller built on embedded technology canreducethe systemhardwarescale,facilitate application2895development, cut down the cost and enhance the systemsreliability and real-time performance.III.TASKPARTITIONData flow diagram (DFD) is an important design aid toolin system development, which allows the developerofasystem to graphically show the flow of data in the system.DFD describe and analyze system more precisely than anyother artifact, specifically in modelingofreal time embeddedsystem 7. The ultimate data flow diagramofthe engravingmachine system is shown as Fig. 2.A task represents the executionofa sequential program ora sequential component in a concurrent program. Each taskdeals with one sequential thread of execution; hence noconcurrency is allowed within a task. However, overall systemconcurrency is obtained by having multiple tasks that executein parallel.The system decomposition by DFD has already beenpreliminarily analyzed. The dataflowofthe system is clearlyrevealed, thus functionsofthe system and dataflow betweenthem can be able to recognize conveniently. The next step ishow to identify the concurrent tasks in the system by applyingthe task structuring criteria and the DFD. Here, the DARTS(Design Approach for Real Time System) method was used todecompose the system into smaller and more manageableunits with well defined interfaces between them. Its centraltheme is to address the key aspectsofstructuring the systeminto concurrent tasks and define the interfaces between them.DARTS uses a setoftask structuring criteria, which be calledH Gomma principles for identifying the concurrent tasks inthe system as well as a setofguidelines for defining thecommunicationandsynchronizationinterfacesbetweenvarious tasks.,.- - - - - - - -.IIIIFig. 2 The DFDofengraving machineThe task structuring criteria are a setofheuristics derivedfrom experience that obtained in the designofconcurrentsystem. The main consideration in identifying tasks is theasynchronous natureofthe functions within the system. TheHGommaprinciplesaregroupedintothreeseparatecategories based on how they are used to assist in the taskstructuring activity. The first is event dependency criteria. Theevent dependency criteria address how and when a task isactivated, including device I/O dependency, periodic event,control function and user interface dependency et al. Thesecond is task cohesion criteria. The cohesion criteria providea means of assessing the asynchronous natureofthe functionsand hence a basis for determining whether and/or howfunctions should be combined into concurrent tasks, includingsequentialcohesion,temporalcohesionandfunctionalcohesion. The third is task priority criteria including timecritical and computationally intensive 8.Toachievethegoalofstructuringasystemintoconcurrent tasks, the task structuring criteriaofH Gammaprinciple arc applied to the functions shown in the data flowdiagram. Based on these criteria, the engraving softwaresystem can be divided into seven parts which arc shown asfollows (i.e. the dashed line frame in Fig. 2).(a)UserInterfaceTask: todisplaytheinteractioninformation with the user such as coordinate, part origin andprocess progress as well as other state information etc.(b) Keyboard Processing Task: to receive the controlcommand from the control panel such as selecting file, systemsetting or parameter setting, manual movement etc, then makethe corresponding treatment.(c)File Processing Task: to read file from U disk, theninterpret the G-code or HPGL-code processing file. The resultwill be stored in buffer.(d) Data Processing Task: to read data from the bufferand process it through the control algorithm, such as treatmentofsmalllineblocks(JudgebigS),accelerationanddeceleration control, interpolation processing.(e) Interrupt Service Task: to send control pulsesofthestepping motors to FPGAwhen ARM received interruptsignal from FPGA.(f) Extended Functions Task: to realize some extendedfunctions. Thesefunctions, includingupdatethecontrolprogram, remote control, network management and simulationofthe movementofthe tool etc, can be added according todifferent requirement.(g)FPGAProcessing Task: to implement real timefunctions, such as send control pulses to the stepping motorsreal-timely, receive and process sensor signal etc.Tasks (a) - (f) are implemented in the ARM becauseofits powerful computing ability. Task (g) is implemented in theFPGA due to its real-time processing ability.IV.ARCHITECTURE D ESIGNA.Software ArchitectureSoftware architecture typically plays a key role as abridgebetweenrequirementsandimplementation.Thesoftware architecture for NC engraving machine controllerbased on embedded Linux is shown in Fig. 3 and each partofthe architecture is also described below.SoftwareArchitecture.unction ModulesIUser lru erfaceIIKeyboard ProcessingIIrileProcessingIIInterrupt ServiceIIData Proce.ingIIblendedFunctionsIIRoot FileSystemI IGCII ISystem ManagementI(YAFFS)(Qt/EmbeddedjInterfaceIEmbeddedLinuxKernelIIBSP (Flash. SDRA M, t.:Sll. l CD.CS900.Serial. Camera. etc)IHardwareFig. 3 Software architectureBSP (Board Support Packet) is a software developingpackage between the hardware layer and the software layer. Itis usedto cover the differencesofhardware, boottheoperating systemand provide device driver. It is a keyinterface between hardware and embedded operating system.The version of embedded Linux kernel is 2.6, whichmany new features have been added to support the wideapplicationofembedded system. It can be customized andported based on ARM to meet our special requirements of theNC engraving system. At the same time, using embeddedLinuxcan simplifysystem design. Complex applicationprogram can be divided into some simple tasks which aremanaged by the embedded Linux.Based on the embedded Linux kernel, root file systemand embedded graphical user interface (GUI) were selectedwith the requirementsofthe system. System managementinterface is also supported by embedded Linux.The YAFFS (yet another flash file system) is adopted forroot file system, which is also a kindofLog-structured filesystem like JFFS/JFFS2. It is specially designed for NANDFlash and suitable for mass-storage devices. YAFFS is thusdesigned not only to adapt to the features of NAND Flash, butalso to better use the advantages of NAND Flash to reach bestperformance. It uses log structure, error checking correctionand technique to improve NAND Flash s robustness. TheadventofYAFFS makes the low cost NAND chip effectiveand robust. YAFFS is highly portable and can run on Linux.Qt/Embedded is a famous commercial embedded GUItool, has great cross-platform ability, can be convenientlyapplied in present popular OS, such as embedded Linux.QUEcan directly communicate with I/O devices. Furthermore, itssystemarchitectureorientedforobjectmakesitscodestructuralized, reusable and run fast.QUEsupports framebuffer driver and can directly write frame buffer without X-server or X-lib support. In this way, it saves memory cost andimprovesapplication running efficiency9. Consideringadvantages mentioned above, this paper adopts it as embeddedlightweightGUIcomponentlibrary basicconstruct tooloriented to industry monitoring.2896ReceiveMessager - -,1OutputdataselectorunitMessage Queuemessagemess3geFig. 6 Message queueInputdataselectorunit2 -IUX ISend Messager - - - -,1and, rather than a binary semaphore, a mutex lock will be usedto represent mutex. The producer and consumer - running asseparate threads - will move items to and from a buffer that issynchronized with these empty, full, and mutex structures.FIFOallowsthemoduleswithinadesigntobedecoupled. The FIFO interface is simple, reducing designtime. FIFO is seldom bottlenecks, since the width and depthcan be adjusted and is well suited for connecting customhardware directly to the embedded processors, and is simpleto implement with a short design cycle and small code size12.Theping-pangoperationisintroducedintotheasynchronous FIFO design to make FPGA and ARM torealize seamless buffering and processing for high speed datastreams, as well as to ensure the pipeliningofFPGAprocessing. The typical ping-pang operation method is shownas Fig. 5 13.Fig. 5 Ping-pang operationThe processing flowofping-pang operationofFPGA isfollowed as: the input data from ARM is firstly allocated toData buffer module I through Input data selector unit,and then at next switching time, the input data will be bufferedin Data buffer module 2. At the same time, the data bufferedin Data buffer module I last time is sent to Data ProcessingModule for processing through Output data sciector unit.At the third time, the input and output data will be exchangedto the two data buffer modules again. The steps mentionedabove will be repeated and repeated. The data buffer moduleis FIFO in our system. The switching signal for data selectorunit is the interrupt signal which sent by FPGA when it needsdata. That means when the data buffered in oneofthe twodata buffer modules has been processed, then FPGA will sendan external interrupt signal to ARM. So ARM will send datato FPGA in interrupt service routine. FPGA will buffer thedata in this data buffer module when it has received.Meanwhile, the Data Processing Module can still processthe data in the other data buffer module. Ping-pang operationpromotes the concurrency of the system.Another way used to achieve the same effect for othertasks is via a message-queue, which is for the operatingsystem to provide the meansofcooperating processes tocommunicate with each other as shown in Fig.6.ConsumerProducerFig. 4 Producer-Consumer problemTo allowproducerand consumerprocessesto runconcurrently, we must have an available bounded buffer ofitems that can be filled by the producer and emptied by theconsumer. This buffer will reside in a regionofmemory thatis shared by the producer and consumer processes. A producercan produce one item while the consumer is consuminganother item. Concurrent access to shared data may result indata inconsistency. The producer and consumer must besynchronized, so that the consumer does not try to consume anitem that has not yet been producedII.In order to solvesynchronization, semaphores will be used. For this project,standard counting semaphores will be used for empty and full,On the basis of services provided by the parts mentionedabove, the application tasksofNC engraving (except forFPGA processing task) are developed on ARM. The FPGAprocessingtask will be developedseparately by FPGAdevelopment tool.The software system is simple and clear by hierarchicalarchitecture design, so as to avoid that the overall system istoo huge and too complicated. Furthermore, the advantagesofthe hierarchical architecture: different control componentsbasedon differenttime granularitiescanbeintegratedseamlessly, at the same time it can make easy synchronouscoordinationbetween the low level continuousdynamicsystem and the high level discrete event systems 10.B.Inter-task InterfaceFIFObufferorsharedmemorycanbeusedtocommunicate between tasks. Where a memory is accessed bymorethanonetask,theaccessproceduresmustbesynchronized with others access to the data. This paper useshared memory to communicate between file processing taskand dadaprocessingtask and adoptproducer-consumerproblem algorithm to solve the synchronization problem. Fileprocessingtaskis representedas producer,whiledataprocessing task is represented as consumer. A producerprocess produces data that is consumed by a consumerprocess. FigA shows the program flow chart.2897150,.-,-r-,-.-,-.-r-,-,(3)(2)v0.000150=0.0025I,II,I140 -i-;-;-;-I,I,130.-.-. .-.-. . -. . . -._._.+ .-.-.-;-;-:T=O.15nN-r-I-I-+-+-+- - - - - - -+-I,I,I,II,- -t - t - f - - -t - -I,I,I,III,I- -:-:-:-:-I,II,I- - - -_._ - - - - - - - - - - - - -:- - - - - - - : - - - - - -,II,II,II,I-r-r-r-t-r-t-t-tlooo-t-t-1 -l-l-1 -.:.r n:goo rrrrr r- - - -.-:-:-:-:-:-:-. -. .-. - -. -.-.-r-t-.-.-t-t-t-.-.-. ._._ ._ ._ .-t_ ._ ._ .t_ ._ .t_ ._ ._!_-t-vf0.060nnT=-(s)=0.15-(ms)fvThe figureofthe (3) is shown in Fig.?, which is plottedby using matlab.015610vecc av(mlmi n)Fig. 7 The relationship between T, n and vAs the figure shown, we can know that FPGA can waitlonger for ARM interrupt response latency as the n increasing.When the parameter n is fixed on, the time T is rapidlydecreased as the velocityofengraving v increasing. While thetime T is fixed on, in order to improve the engraving speed,the sizeofdata buffer n should be larger. The time T thatFPGA can at least wait for ARM interrupt response latencycan be confirmed when the maximumofengraving velocity vand data buffer size n are fixed on. Compare the time T andARM interrupt response latency, we can judge that whetherthe design can satisfy the requirementofreal time.Aiming at the question mentioned before, an exampleofreal-time is analyzed as bellow. If the frequencyofpulse sentto stepping motor is restricted between 100Hz-40000Hz. Thatisthevelocityofengravingisrestrictedbetween0.0lSm/min-tim/min. The sizeofdata buffer module is set to500. Then after FPGA sent an interrupt signal to ARM whenit has processed one data buffer module, there will be12.5ms-5000ms(i.e.I2500!s-5000000!S)forinterruptresponse latency which were gotten by using (3). However,followed: the velocityofengraving, which represented as vand its unit is m/min; the sizeofdata buffer module in FPGAis represented as n; the frequencyofsending pulse to steppingmotor is represented as f, whichunit is Hz; the pulseequivalent is represented as(5;the time that FPGA can atleast wait for the interrupt response latency is represented asT, its unit is ms. The relationships between them are shown asbelow.v=fo(mm /s)=0.06fo(m/ min)(I)The pulse equivalent(5in this engraving machine is0.0025mm. So we can getMessage queue provides a mechanism to allow processesto communicate and to synchronize their actions withoutsharing the same address space and is particularly useful in adistributed environment, where the communicating processesmay reside on different computers. A message-queue facilityprovides at least two operations which are send (message) andreceive (message).In Linux system, the msggeu) function is used to create amessage queue, the msgsndt) function is used to send amessage to a message queue and the msgrcvt) function is usedto receive a message from a message queue. When a task sendmessage to a message queue, it firstly judge that whether themessage queue is full or not. If the queue is full, then the taskwill be waiting until other task has got message from themessage queue. Similarly, when a task receive message from amessage queue, it firstly judge that whether the messagequeue is empty. If the message queue is empty, then the taskwill be waiting until other task has sent message to themessage queue. Message queue has five working modes,which are respectively one to one, one to many, many to one,many to many and full duplex. Different working mode can bechosebaseondifferentrequirementofcommunicationbetween tasks.V.REAL-TIMEANALYSISTask can be classified as real-time task and non real-timetask according to different real-time request. The engravingmachine has three coupling stepping motors to generate XYZmovement, each motor has its driver that receives two controlsignals, one is pulse and the other is direction.Italso has threelimiting sensors to determine the racing endpointsofthe axis.FPGA is mainly in chargeofreal-time tasks, such as doingfront-end processing workofsensor and control information.So, the real-time task in our system is the FPGA ProcessingTask, which is described with VHDL (Very High SpeedIntegrated Circuit Hardware Description Language). FPGA isdirectlyconnectedtotheARMmemorybus.Thecommunication between them is implemented by reading andwriting memory address to transport instruction and data. Thesystem uses the10memory mapping method for the userspace to operate FPGA. Besides the address bus, data bus andcontrol signal lines, there is also an external interrupt signalconnected to ARM from FPGA. In order to get smoothoperation and efficiency, a key problem is whether FPGA cansend control signals to driver continually. That is, whetherFPGA is lackofcontrol signals. If in that condition, thestepping motor will be blocked. To solve this problem, ping-pang operation is adopted for FPGA to process data. So theproblem is converted to that after FPGA has processed onedata buffer module, whether the ISR in ARM can response theinterrupt signal during the other data buffer module is beingprocessed.The condition is analyzed that how long can FPGA waitfor the Linux interrupt response latency by using data buffermodule under worst case. The influencing factors had beengot in our system. The related parameters are shown as2898the interrupt response lateney in normal Linux is within60011S14.Asyouknow,thisiseompletelysatisfiedtherequirement of real time.Ofcourse, the reservation time forinterrupt latency can also be adjusted by the sizeofdata buffermodule in FPGA. Obviously, the sizeofdata buffer is limited.The real time core will be added to the embedded Linux if thesize is no longer satisfied the requirementofimproving theengraving speed. So the RT-Linux will be suitable in that casebecause its interrupt response latency is only within tensofmicroseconds. That is the double-kernel method to improveLinux real time performance.VI.REAL ApPLICAnONTo confirm the effective of this software architecture, ithasbeenpracticallyappliedto the engravingmachinecontroller. The hardware platform prototypeofthis controlsystem is shown in Fig. 8.A. Display panelB.Controller core boardC. Control panel D. Adapter panel E. DriverFig. 8 Prototype of control systemThe engraving sample is shown in Fig.9, which wasengraved by the controller shown above.Fig. 9 Engraving sampleVII.CONCLUSIONIn this paper, the new software architecture is proposedfor NC engraving machine controller based on embeddedLinux.Itfacilitates application software development, cutsdown development cost, shortens development period andenhances the systems reliability and real-time performance.Theflexibility and adaptabilityof the system are alsoimproved greatly. The effective of t
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