缩写稿-数字频率合成器的设计

毕业设计完整材料，包含仿真文件。请联系QQ68661508毕业论文缩写稿题目数字频率合成器的设计学生田耀青学号20110311101院（系）职业教育师范学院专业电子信息工程指导教师陈晓莉2015年05月30日数字频率合成器的设计电子信息工程111班田耀青指导教师陈晓莉（陕西科技大学职业教育师范学院陕西西安710021）摘要频率合成器是无线通信系统中一个很重要的模块，。它通过产生一系列与参考信号具有同样精度和稳定度的离散信号，为频率转换提供基准的本地振荡信号。频率合成器设计的优劣直接影响到无线通信收发机的性能、成本，故其实现方式一直给设计者提出挑战。由频率合成技术获得的信号源具有高频率稳定度和准确度，并且能方便地改变频率，其中频率合成方法有直接式和间接式两种。锁相环频率合成器是目前应用较为广泛的一种频率合成技术。本文主要介绍74HC4046锁相环数字频率合成器的构成电路以及原理。74HC4046锁相环数字频率合成器主要由振荡源电路、固定分频器，1/可预置分频器以及锁相环电路构成。其功能是将一给定频率的输入信号经频率合成后产生一系列的N倍频率的输出信号。此频率合成器具有系统稳定、精确度高、较高的可选择性与实用性等特点。该方案简单易行且易于调试，具有较高的实用价值。关键词频率合成，锁相环，74HC4046，分频器DESIGNOFDIGITALFREQUENCYSYNTHESIZERABSTRACTTHEFREQUENCYSYNTHESIZERISAVERYIMPORTANTMODULEINTHEWIRELESSCOMMUNICATIONSYSTEM,ITGENERATESASERIESOFDISCRETESIGNALSWITHTHESAMEACCURACYANDSTABILITYASTHEREFERENCESIGNAL,ANDPROVIDESAREFERENCEFORTHEFREQUENCYCONVERSIONLOCALOSCILLATINGSIGNALTHEPROSANDCONSOFTHEFREQUENCYSYNTHESIZERDESIGNHASADIRECTINFLUENCEONTHEWIRELESSCOMMUNICATIONTRANSCEIVERPERFORMANCE,COST,SOTHEWAYTOTHEDESIGNERCHALLENGETHESIGNALSOURCESYNTHESIZEDBYTHEFREQUENCYSYNTHESIZERHASTHEHIGHFREQUENCYSTABILITYANDACCURACY,ANDCANCHANGETHEFREQUENCYEASILY,ANDTHESYNTHETICMETHODOFFREQUENCYHASTWOKINDSOFDIRECTANDINDIRECTTHEPLLFREQUENCYSYNTHESIZERISAWIDELYUSEDFREQUENCYSYNTHESISTECHNOLOGYATPRESENTTHISPAPERMAINLYINTRODUCESTHECIRCUITANDPRINCIPLEOF74HC4046PLLDIGITALFREQUENCYSYNTHESIZERTHE74HC4046PLLDIGITALFREQUENCYSYNTHESIZERISCOMPOSEDOFTHEOSCILLATINGSOURCE,THEFIXEDFREQUENCYDIVIDER,THE1/NOFTHEPRESETFREQUENCYDIVIDERANDTHEPLLCIRCUITITSFUNCTIONISTOGENERATEASERIESOFOUTPUTSIGNALSOFNTIMESAFTERFREQUENCYOFTHEINPUTSIGNALOFAGIVENFREQUENCYTHISFREQUENCYSYNTHESIZERHASTHECHARACTERISTICSOFSTABILITY,ACCURACY,HIGHSELECTIVITYANDPRACTICALITYTHISSCHEMEISSIMPLEANDEASYTODEBUG,ANDHASHIGHPRACTICALVALUEKEYWORDSFREQUENCYSYNTHESIS,PHASELOCKEDLOOP,74HC4046,FREQUENCYDIVIDER1课题目标本文的主要目标是设计一种基于74HC4046和TC9198设计锁相环时钟频率合成器，要求输出频率为110MHZ,分辨率为10KHZ的频率合成器。2系统框图图21频率合成器总体设计工作原理首先把1024MHZ信号经1/1024分频器产生的参考信号和VCO的输出信号经可变分频器后得到的反馈信号，输入到74HC4046的鉴相器中进行比较，然后输出误差电压，误差电压经过环路滤波器后得到控制电压来控制压控振荡器进而改变反馈信号的频率，当两个信号的频率相等时锁相环就达到锁定状态。即FRFI，FIFO/N得FONFR,因此，当FR不变时，改变可变分频器的分频比N,压控振荡器的输出频率FO就会相应改变。3硬件电路设计31晶体振荡电路R147K12G174LS0412G274LS04X2CRYSTALC210PFC133PF图31晶体振荡电路32固定分频电路D015Q03D1112D210Q26D3937RCO13CLK14E4D/U5PL1TC12U174HC191D015Q03D1112D210Q26D3937RCO13CLK14E4D/U5PL1TC12U274HC191AD015Q03D1112D210Q26D3937RCO13CLK14E4D/U5PL1TC12U374HC191ABCDABCD图3274HC191组成的固定分频电路33锁相环电路COMPIN3VCIN9SIGIN14CX16CX27INH5R11R212P1PC1OUT2PC2OUT13VCOUT4DEMOD10ZENER15U374HC4046COMPIN3VCOIN9SIGIN14CX16CX27INH5R11R212P1PC1OUT2PC2OUT13VCOUT4DEMOD10ZENER15U274HC4046R210KC31NFC41NFR310KD1DIODESCR462KC5680P45V图33锁相环电路34可变分频电路D1721D1620D1519D1418D1317D1216D115D1014D913D812D71D610D59D48D37D26D15D04POUT23VD24GND1MODE2FSC3PIN2U1TC9198PC101UF图33TC9198组成的可变分频电路35总体电路图R147K1312U1D74LS04110U1E74LS04X2CRYSTALC210PF13PFD015Q03112D210Q263937RCO13CLK14ED/U5PL1TC12U174H19D015Q03112D210Q263937RCO13CLK14ED/U5PL1TC12U274H19D015Q03112D210Q263937RCO13CLK14ED/U5PL1TC12U374H19COMPIN3VI9SIGIN14CX16CX27INH5R1122P1C1OUT2PC2OUT13VCOUT4DEMOD10ZNR5U574HC406COMPIN3VI9SIGIN14CX16CX27INH5R1122P1PC1OUT2PC2OUT13VCOUT4DEMOD10ZNER5U474HC406R210KC31NFC41NFR310KD1DIODESCR462KC5680P45VD1721D1620D1519D1418D1317D1216D115D1014D913D812D71D610D59D48D37D26D15D04POUT23VD24GND1MODE2FSC3PIN2U6TC918PC601UFOUT图35锁相环频率合成器的电路