八位16进制、八位10进制频率计设计

1、EDA综合实习报告一李爱 20111154006 电子科学与技术2011级1. 数字频率计的设计（1）8位16进制频率计主程序：LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY MAIN IS PORT (A,clk1,CLK: IN STD_LOGIC; O:OUT STD_LOGIC_VECTOR(2 DOWNTO 0); P: OUT STD_LOGIC_VECTOR(6 DOWNTO 0);END;ARCHITECTURE HEAD OF MAIN ISCOMPONENT

2、 CEPIN PORT (CLK1:IN STD_LOGIC; CNT: OUT STD_LOGIC; RST:OUT STD_LOGIC; LOAD:OUT STD_LOGIC);END COMPONENT;COMPONENT JISHUPORT (CLR:IN STD_LOGIC; EN:IN STD_LOGIC; FIN:IN STD_LOGIC; COUT:OUT STD_LOGIC_VECTOR(31 DOWNTO 0) ); END COMPONENT;COMPONENT SUOCUNPORT( LK :IN STD_LOGIC; DIN:IN STD_LOGIC_VECTOR (

3、31 DOWNTO 0); QDOUT: OUT STD_LOGIC_VECTOR (31 DOWNTO 0); END COMPONENT;COMPONENT XIANSHIPORT (clk: in std_logic; Q:IN STD_LOGIC_VECTOR(31 DOWNTO 0); T:buffer STD_LOGIC_VECTOR(2 DOWNTO 0); Y:OUT STD_LOGIC_VECTOR(6 DOWNTO 0); END COMPONENT;SIGNAL NET1,NET2,NET3:STD_LOGIC;SIGNAL NET4,NET5 :STD_LOGIC_VE

4、CTOR(31 DOWNTO 0);BEGINU1:CEPIN PORT MAP (CLK1=>CLK,CNT=>NET1,RST=>NET2,LOAD=>NET3);U2:JISHU PORT MAP (CLR=>NET2,EN=>NET1,FIN=>A,COUT=>NET4);U3:SUOCUN PORT MAP (LK=>NET3,DIN=>NET4,QDOUT=>NET5);U4:XIANSHI PORT MAP (clk=>clk1,Q=>NET5,Y=>P,T=>O);END HEAD;测频L

5、IBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY cepin IS PORT (CLK1:IN STD_LOGIC; CNT: OUT STD_LOGIC; RST:OUT STD_LOGIC; LOAD:OUT STD_LOGIC); END ; ARCHITECTURE one OF cepin IS SIGNAL M: STD_LOGIC; BEGIN PROCESS (CLK1) BEGIN IF CLK1 'EVENT AND CLK1='1' T

6、HEN M<= NOT M;END IF; END PROCESS; PROCESS (CLK1,M) BEGIN IF CLK1='0' AND M='0' THEN RST<='1' ELSE RST <='0' END IF; END PROCESS; LOAD <= NOT M; CNT <=M; END one;计数LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY JISHU

7、IS PORT (CLR:IN STD_LOGIC; EN:IN STD_LOGIC; FIN:IN STD_LOGIC; COUT:OUT STD_LOGIC_VECTOR(31 DOWNTO 0) );END ; ARCHITECTURE two OF JISHU IS SIGNAL Q: STD_LOGIC_VECTOR(31 DOWNTO 0); BEGIN PROCESS (CLR,EN,FIN) BEGIN IF CLR='1' THEN Q <= (OTHERS=>'0'); ELSIF FIN 'EVENT AND FIN=&

8、#39;1' THEN IF EN='1' THEN Q <= Q+1; END IF; END IF; END PROCESS; COUT <=Q; END two;锁存LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY SUOCUN IS PORT( LK :IN STD_LOGIC; DIN:IN STD_LOGIC_VECTOR (31 DOWNTO 0); qDOUT: OUT STD_LOGIC_VECTOR (31 DOWNTO 0

9、); END ; ARCHITECTURE three OF SUOCUN IS BEGIN PROCESS (LK,DIN) BEGIN IF LK 'EVENT AND LK='1' THEN qDOUT <=DIN; END IF; END PROCESS; END three;显示LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY XIANSHI IS PORT (clk: in std_logic; Q:IN STD_LOGIC_VECTOR

10、(31 DOWNTO 0); T:buffer STD_LOGIC_VECTOR(2 DOWNTO 0); Y:OUT STD_LOGIC_VECTOR(6 DOWNTO 0); END ; ARCHITECTURE four OF XIANSHI IS BEGIN PROCESS(Q,clk,T) VARIABLE Q1:STD_LOGIC_VECTOR(3 DOWNTO 0);BEGIN IF clk'event and clk='1' THEN Q1:=Q1+'1' END IF;if Q1="0001" thenCASE Q(

11、3 downto 0) IS WHEN "0000"=>T<="000"Y<="0111111" WHEN "0001"=>T<="000"Y<="0000110" WHEN "0010"=>T<="000"Y<="1011011" WHEN "0011"=>T<="000"Y<="1001111

12、" WHEN "0100"=>T<="000"Y<="1100110" WHEN "0101"=>T<="000"Y<="1101101" WHEN "0110"=>T<="000"Y<="1111101" WHEN "0111"=>T<="000"Y<="0000111" W

13、HEN "1000"=>T<="000"Y<="1111111" WHEN "1001"=>T<="000"Y<="1101111" WHEN "1010"=>T<="000"Y<="1110111" WHEN "1011"=>T<="000"Y<="1111100" WHEN &quo

14、t;1100"=>T<="000"Y<="0111001" WHEN "1101"=>T<="000"Y<="1011110" WHEN "1110"=>T<="000"Y<="1111011" WHEN "1111"=>T<="000"Y<="1110001" WHEN OTHERS=>

15、NULL; END CASE; elsif Q1="0010" thenCASE Q(7 downto 4) IS WHEN "0000"=>T<="001"Y<="0111111" WHEN "0001"=>T<="001"Y<="0000110" WHEN "0010"=>T<="001"Y<="1011011" WHEN "00

16、11"=>T<="001"Y<="1001111" WHEN "0100"=>T<="001"Y<="1100110" WHEN "0101"=>T<="001"Y<="1101101" WHEN "0110"=>T<="001"Y<="1111101" WHEN "0111"

17、=>T<="001"Y<="0000111" WHEN "1000"=>T<="001"Y<="1111111" WHEN "1001"=>T<="001"Y<="1101111" WHEN "1010"=>T<="001"Y<="1110111" WHEN "1011"=>T&l

18、t;="001"Y<="1111100" WHEN "1100"=>T<="001"Y<="0111001" WHEN "1101"=>T<="001"Y<="1011110" WHEN "1110"=>T<="001"Y<="1111011" WHEN "1111"=>T<="

19、;001"Y<="1110001" WHEN OTHERS=> NULL; END CASE; elsif Q1="0011"then CASE Q(11 downto 8) IS WHEN "0000"=>T<="010"Y<="0111111" WHEN "0001"=>T<="010"Y<="0000110" WHEN "0010"=>T<=

20、"010"Y<="1011011" WHEN "0011"=>T<="010"Y<="1001111" WHEN "0100"=>T<="010"Y<="1100110" WHEN "0101"=>T<="010"Y<="1101101" WHEN "0110"=>T<="01

21、0"Y<="1111101" WHEN "0111"=>T<="010"Y<="0000111" WHEN "1000"=>T<="010"Y<="1111111" WHEN "1001"=>T<="010"Y<="1101111" WHEN "1010"=>T<="010"Y

22、<="1110111" WHEN "1011"=>T<="010"Y<="1111100" WHEN "1100"=>T<="010"Y<="0111001" WHEN "1101"=>T<="010"Y<="1011110" WHEN "1110"=>T<="010"Y<=&qu

23、ot;1111011" WHEN "1111"=>T<="010"Y<="1110001" WHEN OTHERS=> NULL; END CASE; elsif Q1="0100" then CASE Q(15 downto 12) IS WHEN "0000"=>T<="011"Y<="0111111" WHEN "0001"=>T<="011"Y&

24、lt;="0000110" WHEN "0010"=>T<="011"Y<="1011011" WHEN "0011"=>T<="011"Y<="1001111" WHEN "0100"=>T<="011"Y<="1100110" WHEN "0101"=>T<="011"Y<=&quo

25、t;1101101" WHEN "0110"=>T<="011"Y<="1111101" WHEN "0111"=>T<="011"Y<="0000111" WHEN "1000"=>T<="011"Y<="1111111" WHEN "1001"=>T<="011"Y<="110111

26、1" WHEN "1010"=>T<="011"Y<="1110111"WHEN "1011"=>T<="011"Y<="1111100" WHEN "1100"=>T<="011"Y<="0111001" WHEN "1101"=>T<="011"Y<="1011110" W

27、HEN "1110"=>T<="011"Y<="1111011" WHEN "1111"=>T<="011"Y<="1110001" WHEN OTHERS=>NULL; END CASE; elsif Q1="0101" thenCASE Q(19 downto 16) IS WHEN "0000"=>T<="100"Y<="0111111&qu

28、ot; WHEN "0001"=>T<="100"Y<="0000110" WHEN "0010"=>T<="100"Y<="1011011" WHEN "0011"=>T<="100"Y<="1001111" WHEN "0100"=>T<="100"Y<="1100110" WHEN

29、 "0101"=>T<="100"Y<="1101101" WHEN "0110"=>T<="100"Y<="1111101" WHEN "0111"=>T<="100"Y<="0000111" WHEN "1000"=>T<="100"Y<="1111111" WHEN "1

30、001"=>T<="100"Y<="1101111" WHEN "1010"=>T<="100"Y<="1110111" WHEN "1011"=>T<="100"Y<="1111100" WHEN "1100"=>T<="100"Y<="0111001" WHEN "1101"

31、;=>T<="100"Y<="1011110" WHEN "1110"=>T<="100"Y<="1111011" WHEN "1111"=>T<="100"Y<="1110001"WHEN OTHERS=> NULL; END CASE; elsif Q1="0110" then CASE Q(23 downto 20) IS WHEN "000

32、0"=>T<="101"Y<="0111111" WHEN "0001"=>T<="101"Y<="0000110" WHEN "0010"=>T<="101"Y<="1011011" WHEN "0011"=>T<="101"Y<="1001111" WHEN "0100"=

33、>T<="101"Y<="1100110" WHEN "0101"=>T<="101"Y<="1101101" WHEN "0110"=>T<="101"Y<="1111101" WHEN "0111"=>T<="101"Y<="0000111" WHEN "1000"=>T<

34、;="101"Y<="1111111" WHEN "1001"=>T<="101"Y<="1101111" WHEN "1010"=>T<="101"Y<="1110111" WHEN "1011"=>T<="101"Y<="1111100" WHEN "1100"=>T<="

35、101"Y<="0111001" WHEN "1101"=>T<="101"Y<="1011110" WHEN "1110"=>T<="101"Y<="1111011" WHEN "1111"=>T<="101"Y<="1110001" WHEN OTHERS=> NULL; END CASE; elsif Q1=&quo

36、t;0111" thenCASE Q(27 downto 24) IS WHEN "0000"=>T<="110"Y<="0111111" WHEN "0001"=>T<="110"Y<="0000110" WHEN "0010"=>T<="110"Y<="1011011" WHEN "0011"=>T<="11

37、0"Y<="1001111" WHEN "0100"=>T<="110"Y<="1100110" WHEN "0101"=>T<="110"Y<="1101101" WHEN "0110"=>T<="110"Y<="1111101" WHEN "0111"=>T<="110"Y

38、<="0000111" WHEN "1000"=>T<="110"Y<="1111111" WHEN "1001"=>T<="110"Y<="1101111" WHEN "1010"=>T<="110"Y<="1110111" WHEN "1011"=>T<="110"Y<=&qu

39、ot;1111100" WHEN "1100"=>T<="110"Y<="0111001" WHEN "1101"=>T<="110"Y<="1011110" WHEN "1110"=>T<="110"Y<="1111011" WHEN "1111"=>T<="110"Y<="11100

40、01" WHEN OTHERS=> NULL; END CASE; elsif Q1="1000" then CASE Q(31 downto 28) IS WHEN "0000"=>T<="111"Y<="0111111" WHEN "0001"=>T<="111"Y<="0000110" WHEN "0010"=>T<="111"Y<=&quo

41、t;1011011" WHEN "0011"=>T<="111"Y<="1001111" WHEN "0100"=>T<="111"Y<="1100110" WHEN "0101"=>T<="111"Y<="1101101" WHEN "0110"=>T<="111"Y<="111110

42、1" WHEN "0111"=>T<="111"Y<="0000111" WHEN "1000"=>T<="111"Y<="1111111" WHEN "1001"=>T<="111"Y<="1101111" WHEN "1010"=>T<="111"Y<="1110111"

43、WHEN "1011"=>T<="111"Y<="1111100" WHEN "1100"=>T<="111"Y<="0111001" WHEN "1101"=>T<="111"Y<="1011110" WHEN "1110"=>T<="111"Y<="1111011" WHEN &qu

44、ot;1111"=>T<="111"Y<="1110001" WHEN OTHERS=> NULL;END CASE;end if; END PROCESS; END four;引脚：A：测频端口CLK：1Hz输入频率CLK1：2048Hz的刷新频率O：三八译码器选择端口P：数码管显示（2）8位10进制频率计主程序 ：LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY MAIN IS PORT (CLK1,FSIN:IN STD_LOGIC; CLK:IN STD_LOGI

45、C; E:OUT STD_LOGIC_VECTOR(2 DOWNTO 0); DOUT:OUT STD_LOGIC_VECTOR(6 DOWNTO 0); END ; ARCHITECTURE HEAD OF MAIN IS COMPONENT JISHU PORT(CLK,RST,EN:IN STD_LOGIC; CQ:OUT STD_LOGIC_VECTOR(3 DOWNTO 0); COUT :OUT STD_LOGIC); END COMPONENT; COMPONENT CEPINPORT (CLK:IN STD_LOGIC; TSTEN:OUT STD_LOGIC;CLR_CNT:

46、OUT STD_LOGIC; LOAD:OUT STD_LOGIC); END COMPONENT; COMPONENT SUOCUN PORT(LOAD:IN STD_LOGIC; DIN:IN STD_LOGIC_VECTOR(31 DOWNTO 0); DOUT :OUT STD_LOGIC_VECTOR(31 DOWNTO 0); END COMPONENT; COMPONENT XIANSHIPORT (clk: in std_logic; Q:IN STD_LOGIC_VECTOR(31 DOWNTO 0); T:buffer STD_LOGIC_VECTOR(2 DOWNTO 0

47、); Y:OUT STD_LOGIC_VECTOR(6 DOWNTO 0); END COMPONENT; SIGNAL TSTEN:STD_LOGIC; SIGNAL CLR_CNT:STD_LOGIC; SIGNAL LOAD:STD_LOGIC; SIGNAL C1:STD_LOGIC; SIGNAL C2:STD_LOGIC; SIGNAL C3:STD_LOGIC; SIGNAL C4:STD_LOGIC; SIGNAL C5:STD_LOGIC; SIGNAL C6:STD_LOGIC; SIGNAL C7:STD_LOGIC; SIGNAL C8:STD_LOGIC; SIGNA

48、L DIN,S:STD_LOGIC_VECTOR(31 DOWNTO 0); BEGIN U0:CEPIN PORT MAP(CLK=>CLK,TSTEN=>TSTEN,CLR_CNT=>CLR_CNT,LOAD=>LOAD); U1:JISHU PORT MAP(CLK=>FSIN,RST=>CLR_CNT,EN=>TSTEN,CQ=>DIN(3 DOWNTO 0),COUT=>C1); U2:JISHU PORT MAP(CLK=>C1,RST=>CLR_CNT,EN=>TSTEN,CQ=>DIN(7 DOWNT

49、O 4),COUT=>C2); U3:JISHU PORT MAP(CLK=>C2,RST=>CLR_CNT,EN=>TSTEN,CQ=>DIN(11 DOWNTO 8),COUT=>C3); U4:JISHU PORT MAP(CLK=>C3,RST=>CLR_CNT,EN=>TSTEN,CQ=>DIN(15 DOWNTO 12),COUT=>C4); U5:JISHU PORT MAP(CLK=>C4,RST=>CLR_CNT,EN=>TSTEN,CQ=>DIN(19 DOWNTO 16),COUT=

50、>C5); U6:JISHU PORT MAP(CLK=>C5,RST=>CLR_CNT,EN=>TSTEN,CQ=>DIN(23 DOWNTO 20),COUT=>C6); U7:JISHU PORT MAP(CLK=>C6,RST=>CLR_CNT,EN=>TSTEN,CQ=>DIN(27 DOWNTO 24),COUT=>C7); U8:JISHU PORT MAP(CLK=>C7,RST=>CLR_CNT,EN=>TSTEN,CQ=>DIN(31 DOWNTO 28),COUT=>C8);

51、U9:SUOCUN PORT MAP(LOAD=>LOAD,DIN=>DIN(31 DOWNTO 0),DOUT=>S); U10:XIANSHI PORT MAP(CLK=>CLK1,Q=>S,T=>E,Y=>DOUT); END HEAD; 测频LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CEPIN IS PORT (CLK:IN STD_LOGIC; TSTEN:OUT STD_LOGIC; CLR_CNT:OUT STD_L

52、OGIC; LOAD:OUT STD_LOGIC); END ; ARCHITECTURE TWO OF CEPIN IS SIGNAL DIV2CLK :STD_LOGIC; BEGIN PROCESS(CLK) BEGIN IF CLK'EVENT AND CLK='1' THEN DIV2CLK<=NOT DIV2CLK; END IF; END PROCESS; PROCESS(CLK,DIV2CLK) BEGIN IF CLK='0' AND DIV2CLK='0' THEN CLR_CNT<='1'

53、 ELSE CLR_CNT<='0' END IF; END PROCESS; LOAD<=NOT DIV2CLK; TSTEN <=DIV2CLK; END TWO;计数LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL;ENTITY JISHU IS PORT(CLK,RST,EN:IN STD_LOGIC; CQ:OUT STD_LOGIC_VECTOR(3 DOWNTO 0); COUT:OUT STD_LOGIC); END ; ARCHITECTURE

54、 ONE OF JISHU IS BEGIN PROCESS(CLK,RST,EN) VARIABLE CQI:STD_LOGIC_VECTOR(3 DOWNTO 0); BEGIN IF RST='1' THEN CQI:=(OTHERS=>'0'); ELSIF CLK'EVENT AND CLK='1' THEN IF EN='1' THEN IF CQI<"1001" THEN CQI:=CQI+1; ELSE CQI:=(OTHERS=>'0'); END I

55、F; END IF;END IF; IF CQI="1001" THEN COUT<='1' ELSE COUT<='0' END IF; CQ<=CQI; END PROCESS; END ONE; 所存LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL;ENTITY SUOCUN IS PORT(LOAD:IN STD_LOGIC; DIN:IN STD_LOGIC_VECTOR(31 DOWNTO 0); DOUT :OUT STD_LOGIC_VECTOR(31 DOWNTO 0);

56、END ; ARCHITECTURE THREE OF SUOCUN IS BEGIN PROCESS(LOAD,DIN) BEGIN IF LOAD'EVENT AND LOAD='1' THEN DOUT<=DIN; END IF; END PROCESS; END THREE;显示LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY XIANSHI IS PORT (clk: in std_logic; Q:IN STD_LOGIC_VECTOR(

57、31 DOWNTO 0); T:buffer STD_LOGIC_VECTOR(2 DOWNTO 0); Y:OUT STD_LOGIC_VECTOR(6 DOWNTO 0); END ; ARCHITECTURE four OF XIANSHI IS BEGIN PROCESS(Q,clk,T) VARIABLE Q1:STD_LOGIC_VECTOR(3 DOWNTO 0);BEGIN IF clk'event and clk='1' THEN Q1:=Q1+'1' END IF;if Q1="0001" thenCASE Q(3

58、 downto 0) IS WHEN "0000"=>T<="000"Y<="0111111" WHEN "0001"=>T<="000"Y<="0000110" WHEN "0010"=>T<="000"Y<="1011011" WHEN "0011"=>T<="000"Y<="1001111&

59、quot; WHEN "0100"=>T<="000"Y<="1100110" WHEN "0101"=>T<="000"Y<="1101101" WHEN "0110"=>T<="000"Y<="1111101" WHEN "0111"=>T<="000"Y<="0000111" WH

60、EN "1000"=>T<="000"Y<="1111111" WHEN "1001"=>T<="000"Y<="1101111" WHEN OTHERS=> NULL; END CASE; elsif Q1="0010" thenCASE Q(7 downto 4) IS WHEN "0000"=>T<="001"Y<="0111111"

61、; WHEN "0001"=>T<="001"Y<="0000110" WHEN "0010"=>T<="001"Y<="1011011" WHEN "0011"=>T<="001"Y<="1001111" WHEN "0100"=>T<="001"Y<="1100110" WHEN &

62、quot;0101"=>T<="001"Y<="1101101" WHEN "0110"=>T<="001"Y<="1111101" WHEN "0111"=>T<="001"Y<="0000111" WHEN "1000"=>T<="001"Y<="1111111" WHEN "100

63、1"=>T<="001"Y<="1101111" WHEN OTHERS=> NULL; END CASE; elsif Q1="0011"then CASE Q(11 downto 8) IS WHEN "0000"=>T<="010"Y<="0111111" WHEN "0001"=>T<="010"Y<="0000110" WHEN &quo

64、t;0010"=>T<="010"Y<="1011011" WHEN "0011"=>T<="010"Y<="1001111" WHEN "0100"=>T<="010"Y<="1100110" WHEN "0101"=>T<="010"Y<="1101101" WHEN "0110&q

65、uot;=>T<="010"Y<="1111101" WHEN "0111"=>T<="010"Y<="0000111" WHEN "1000"=>T<="010"Y<="1111111" WHEN "1001"=>T<="010"Y<="1101111" WHEN OTHERS=> NULL; EN

66、D CASE; elsif Q1="0100" then CASE Q(15 downto 12) IS WHEN "0000"=>T<="011"Y<="0111111" WHEN "0001"=>T<="011"Y<="0000110" WHEN "0010"=>T<="011"Y<="1011011" WHEN "0011&qu

67、ot;=>T<="011"Y<="1001111" WHEN "0100"=>T<="011"Y<="1100110" WHEN "0101"=>T<="011"Y<="1101101" WHEN "0110"=>T<="011"Y<="1111101" WHEN "0111"=>

68、T<="011"Y<="0000111" WHEN "1000"=>T<="011"Y<="1111111" WHEN "1001"=>T<="011"Y<="1101111" WHEN OTHERS=>NULL; END CASE; elsif Q1="0101" thenCASE Q(19 downto 16) IS WHEN "0000"

69、=>T<="100"Y<="0111111" WHEN "0001"=>T<="100"Y<="0000110" WHEN "0010"=>T<="100"Y<="1011011" WHEN "0011"=>T<="100"Y<="1001111" WHEN "0100"=>T&l

70、t;="100"Y<="1100110" WHEN "0101"=>T<="100"Y<="1101101" WHEN "0110"=>T<="100"Y<="1111101" WHEN "0111"=>T<="100"Y<="0000111" WHEN "1000"=>T<="

71、;100"Y<="1111111" WHEN "1001"=>T<="100"Y<="1101111" WHEN OTHERS=> NULL; END CASE; elsif Q1="0110" then CASE Q(23 downto 20) IS WHEN "0000"=>T<="101"Y<="0111111" WHEN "0001"=>T<="101"