第一讲：ARM CM3内核介绍与Fujitsu FM3资源.

1、ARM CM3内核介绍与Fujitsu FM3资源Cortex-M3 Core Cortex-M3 Core Overview ARM CoreNVICVICETMMemory Protection UnitDAPSerial Wire ViewerData Watch PointsFlash PatchBus MatrixCode InterfaceSRAM & Peripheral I/F MB9B5xx Bus SystemCortex-M3 CoreCodeSRAMFlashFlash I/FAPB0 PeripheralsAHB to APB bridgeI-Code BusD-Co

2、de BusSystem Bus*DMAC BusDMACCANnAHB to AHB Bridge (MUX)USB ChnAPB1 PeripheralsAHB to APB BridgeAPB2 PeripheralsAHB to APB BridgeExt. Bus I/FOn-ChipSRAMAPB1APB2* AHBGlobal Memory Map 4 GBytes address space FLASH SRAM Bit Band Alias Peripherals Bit Band Alias External Area Core AreaBit BandBit access

3、 to RAM and PeripheralOne bit is represented by one word (32bit)RAM Area Alias Address = 0 x22000000 + (32 x RAM Offset) + (4 x bit position)Peripheral Area Alias Address = 0 x42000000 + (32 x Peripheral Offset) + (4 x bit position)-Peripherals0 x43FFF_FFFF0 x4200_00000 x41FF_FFFF0 x4010_00000 x400F

4、_FFFF0 x4000_0000Peripheral Bit Band Alias-RAM0 x23FFF_FFFF0 x2200_00000 x21FF_FFFF0 x2010_00000 x200F_FFFF0 x2000_0000RAMBit Band AliasBit BandExample:Register PDOR3 bit 2Alias = 0 x42000000 + (32 x 0 x3340C) + (4 x 2) = 0 x42668188Clear/Set bit 2 of PDOR3D31 D30 D29D08 D07 D06 D05 D04 D03D02D02D01

5、 D000 x4003340F0 x4003340C-PDOR30 x43FFF_FFFF0 x4200_00000 x4003_340CPeripheral Bit Band AliasBit D03 of PDOR3Bit D02 of PDOR3Bit D01 of PDOR3unsigned int *PDOR3_bit2 = (unsigned int*)(0 x42668188);void main(void) *PDOR3_bit2 = 0; / clear bit *PDOR3_bit2 = 1; / set bit0 x4266_818C0 x4266_81880 x4266

6、_8184Cortex-M3 Register ModelRegisters in the Cortex-M3 (1)R0General-Purpose Register 0R1General-Purpose Register 1R2General-Purpose Register 2R3General-Purpose Register 3R4General-Purpose Register 4R5General-Purpose Register 5R6General-Purpose Register 6R7General-Purpose Register 7R8General-Purpose

7、 Register 8R9General-Purpose Register 9R10General-Purpose Register 10R11General-Purpose Register 11R12General-Purpose Register 12R13 (PSP)Main (MSP) / Process (PSP) Stack PointerR14Link Register (LR)R15Program Counter (PC)R13 (MSP)Low RegistersHigh RegistersCortex-M3 Register ModelRegisters in the C

8、ortex-M3 (1) Special RegistersxPSRPRIMASKProgram Status RegisterFAULTMASKBASEPRICONTROLSpecial RegistersInterrupt Mask RegistersControl RegisterCortex-M3 Register ModelRegisters in the Cortex-M3 (2) Special RegistersxPSRPRIMASKFAULTMASKBASEPRICONTROL APSR: Arithmetic and logic flags (Z, C, etc.) EPS

9、R: Execution status IPSR: Executing interrupt numberDisable all interrupts except NMI and Hard Fault(Rise to Priority 0)Disable all interrupts except NMI (Rise to Prio. -1)Disable all interrupts of specific priority level or lower priority level (Value1 239)Define privileged mode and stack pointer s

10、electionCortex-M3 Operation Modes Cortex-M3 Operating State DiagramThread ModePrivilegedMSP* or PSPHandler ModePrivilegedMSP onlyThread ModeUnprivilegedMSP or PSPResetInterrupt / ExceptionReturn to ThreadMode (P)Interrupt /ExceptionReturn to Thread Mode (U)Switch tounprivileged ModeMSPPSPReturn to H

11、andler Mode (nested Interrupts)Main StackProcess Stack* MSP after ResetWhy “another” CORTEX-M3?Fastest Flash Memory among ARM Cortex M3 familiesHigh Quality Flash100k erase cycles20 yearsretentionWide supply voltage range2.7V.5.5V1.65V.3.6VLong termAvailability10years +Excellent TechnicalSupport in

12、Asia & EuropeSophisticatedMotor ControlTimer3 independent12-bit ADCsMany functionalsafety featuresAdvancedConnectivityUSB host+functionCANEthernetHighPerformanceup to 144MHzoperationfrequencyMemoryPeripheralsSupportCoreProduct Roadmap144MHzHigh Performance Group100/120pinStandard MB9BF51x w/ CAN USB

13、 MB9BF41x w/ CAN MB9BF31x w/ USB MB9BF11x w/o CAN USBEther MB9BF61x w/ Ether144/176pin144/176pin100/120pin48/64pin100/120pin144/176pin64pinLCD MB9AF35x w/ USB MB9AF15x w/o USB64pin80/100pinStandard MB9AF32x w/ USB MB9AF12x w/o USB32/48pin120/144pin64pin32/48pin80/100pin64pin80/100pin80/100pinUpgrade

14、Low Pin CountStandard MB9BF50 x w/ CAN USB MB9BF40 x w/ CAN MB9BF30 x w/ USB MB9BF10 x w/o CAN USB14bit A/DLow Power14bit A/DLow leakStandard MB9AF31x w/ USB MB9AF11x w/o USB64/80/100pinStandard MB9AF10 x w/o CAN USB100/120pin1.83.6V2.75.5V80MHz40MHz20MHzBasic GroupLow Power GroupLow Pin CountStanda

15、rd MB9BF51x w/ CAN USB MB9BF41x w/ CAN MB9BF31x w/ USB MB9BF11x w/o CAN USBStandard MB9BF51x w/ CAN USB MB9BF41x w/ CAN MB9BF31x w/ USB MB9BF11x w/o CAN USB14bit A/D MB9BF52x w/ CAN USB MB9BF42x w/ CAN MB9BF32x w/ USB MB9BF12x w/o CAN USB14bit A/D MB9BF52x w/ CAN USB MB9BF42x w/ CAN MB9BF32x w/ USB

16、MB9BF12x w/o CAN USBLCD MB9AF35x w/ USB MB9AF15x w/o USB14bit A/D MB9AF33x w/ USB MB9AF13x w/o USB14bit A/D MB9AF33x w/ USB MB9AF13x w/o USBStandard MB9AF32x w/ USB MB9AF12x w/o USBLCD MB9CF15x w/o USBStandard MB9CF10 x w/o USBStandard MB9CF10 x w/o USBLCD MB9CF15x w/o USBStandard MB9CF10 x w/o USBU

17、ltra Low Leak GroupFinal Final MCUMCU180u90u180uCY10/OctCY11/AprCY11/OctCY12/AprCY12/OctTarget ApplicationMB9BFx0 xRPackage: QFP-120MFS(UART/SPI/I2C) 8chCortex M3 CPU80MHz (max)2.7-5.5VMain CLK:4MHzSUB CLK:32kHzMAIN RC CLK:4MHzSUB RC CLK:100kHzSubclock (option)RC oscillator +/-2%Clock SupervisorWatc

18、h CounterLow Voltage Detector 2chDMA8chExternal IRQs16ch + NMIHardware WatchdogMB9BFx05RFlash384KSRAM64KMB9BFx04RFlash256KSRAM32KSWJ/TPIU/ETM Debug Ports12-bit ADC 8ch ADT x 3chFRTim x 3chOCU x 6chICU x 4chWaveformGeneratorMulti Function Timer2chDual TimerQDU 2chMB9BFx06RFlash512KSRAM64KUSB FS Host+

19、Function 1CAN (32 MSB) 2ch 1CRCBase Timer8chExternal Bus Interface8/16 Data, 25 Addr, 8CSPPG 6ch1NoteMB9BF1*standardMB9BF3*USBMB9BF4*CANMB9BF5*USB+CANProduct numbering rulePackage pinJ: 32pinK: 48pinL: 64pinM: 80pinN: 100pinR: 120pinS: 144pinT: 176pinMemory size1: 64KB2: 128KB4: 256KB5: 384KB6: 512KB7: 768KB8: 1MBFunction 20-4: Standard5-9: with LCDFunction 11