VHDL流水线加法器

1、可编程实验报告实验报告要求：1、任务的简单描述2、画出电路图3、写出源代码4、仿真结果5、分析和讨论1、3-8译码器源代码:LIBRARY ieee;USE ieee.std_logic_1164.all;USE ieee.std_logic_arith.all;USE ieee.std_logic_sig ned.all;ENTITY dc38 ISP0RT(sel :in stdogic_vector(2 downto 0);y :out stdogic_vector(7 downto 0);END dc38;ARCHITECTURE behavior OF dc38 ISBEGINy &

2、lt;= "11111110" WHEN sel = "000" else "11111101" WHEN sel = "001" else "11111011" WHEN sel = "010" else "11110111" WHEN sel = "011" else "11101111" WHEN sel = "100" else "11011111" WHEN sel

3、= "101" else "10111111" WHEN sel = "110" else "01111111" WHEN sel = "111" else "ZZZZZZZZ"«««««««« JEND behavior;仿真结果：一位全加器比 MA-rplu-G 'll 刊* E<Sr V*w Synh>!巳趴辛* l>ifleii Woof Whdew 怖虫n曲百看

4、 昙 蚪缶蛹窃©总也药E蛋耳卫4吒蛊迫签勺耳三±>瓦11: I* Tiaw 何晁49D 加&I» ri世I可債i一_ rilMMMi； d d|_托 母 BBB幷n MAK»*Lii I 曲丄Kmudd ftJ諾,史I igqrfk l勒*d口U% ll 刊中 Edr View Had中斗料审 Lnh-rt 叶。皿 W-da-比切nqs严桥心囲用目总占险国菟ed6吧港雯澧朋四级流水加法器立第(位 全 加 l=LH、一位全加器第锁存library ieee;use ieee.stdo gic_1164.all;use ieee.std_log

5、ic_ un sig ned.all;use ieee.std_logic_arith.all;en tity adder isport(clk,rst : in std_logic;a,b : in std_logic_vector(3 dow nto 0); sum : out std_logic_vector(3 dow nto 0); c : out std_logic);end en tity adder;architecture depict of adder issignal reg1: std_logic_vector(7 dow nto 0); signal reg2: st

6、d_logic_vector(6 dow nto 0); signal reg3: std_logic_vector(5 dow nto 0); beginbitO:process(clk,rst)beginif(rst='1') the n reg1<="00000000"elsif(ris in g_edge(clk) the n reg1(0)<= a(0) xor b(0);reg1(1)<= a(0) and b(0);reg1(2)<= a(1);reg1(3)<= b(1);reg1(4)<= a(2);re

7、g1(5)<= b(2);reg1(6)<= a(3);reg1(7)<= b(3);end if;end process bit0;bit1:process(clk,rst)beginif(rst='1') the nreg2<="0000000"elsif(ris in g_edge(clk) the nreg2(0)<= reg1(0);reg2(1)<= reg1(1) xor reg1(2) xor reg1(3);reg2(2)<=(reg1(1)andreg1(3)or(reg1(2)a nd reg1

8、(3);reg2(6 dow nto 3)<=reg1(7 dow nto 4);end if;end process bit1;bit2:process(clk,rst)beginif(rst='1') the nreg3<="000000"elsif(ris in g_edge(clk) the nreg3(1 dow nto 0)<=reg2(1 dow nto 0); reg3(2)<=reg2(2)xor reg2(3)xor reg2(4);reg3(3)<=(reg2(2)a ndreg2 (3) )or(reg2

9、(2)a ndreg2(4);reg3(5 dow nto 4)<=reg2( 6 dow nto 5);end if;end process bit2;bit3:process(clk,rst)beginif(rst='1') the nsum<="0000"c<='0'elsif(ris in g_edge(clk) the nsum(2 dow nto 0)<=reg3(2 dow nto 0);sum(3) <=reg3(3)xor reg3(4)xor reg3(5);c<=(reg3 (3) a

10、 ndreg3(4)or(reg3(3)a ndreg1(2)or(reg1(1)a ndreg2 (4) )or(reg2(3)a ndreg3(5)or(reg3(4)a ndreg3(5);end if;end process bit3;end depict;二 Tamo 阳nggytsn: MAXI 讥*id弹比F ,adiih<M 鼻砂a mw4 fngnu4Jnn*H»i ,7gi.呂呼M4J 9Wmt1dta1i r ii i i i i1 rf 1 f£«LD7-nrXV AF；丁；B IDT、r12" 1K j« K L

11、1 J(_j JL1 J. J Jt(3 训D T'K 2K¥rx t* T w乍-X飞 1 U J « :詁丫I1】右】.苯；qD-00I *Xi1尬一：t ；a MAM-rphri II 貝tr Edr 5e Nodt-Q¥4on« HMow Hr|pn启肴虽魄锁园出皿匪匹鬲序也甘覺蛊怕澄冊ci ,s 3 ? *(. 匚 rm 昨 1library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_ un sig ned.all;use ieee.std_logic_arith.all;e

12、n tity n oadd isport(clk,rst : in std_logic;a,b : in std_logic_vector(3 dow nto 0); sum : out std_logic_vector(3 dow nto 0); c : out std_logic);end en tity no add;architecture depict of no add issig nal reg : std_logic_vector(4 dow nto 0);sig nal rega: std_logic_vector(4 dow nto 0);sig nal regb: std

13、_logic_vector(4 dow nto 0);beginprocess(clk)beginif(risi ng_edge(clk)the nrega<='0' & a;regb<='0' & b;end if;end process;process(clk)beginif(rst='1')the nreg<="00000"elsif(ris in g_edge(clk)the nreg<=rega+regb;end if;end process;sum<=reg(3 dow

14、 nto 0);c<=reg(4);end depict;4位十进制数计数器library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_ un sig ned.all;use ieee.std_logic_arith.all;en tity dec_disp is port( clk_c nt : in std_logic;sel1 : out std_logic_vector(3 dow nto 0); sel2 : out std_logic_vector(3 dow nto 0);sel3 : out std_logic_

15、vector(3 dow nto 0);sel4 : out std_logic_vector(3 dow nto 0);end dec_disp;architecture behav of dec_disp issig naldata1:std_logic_vector(3 dow nto 0);sig naldata2:std_logic_vector(3 dow nto 0);sig naldata3:std_logic_vector(3 dow nto 0);sig naldata4:std_logic_vector(3 dow nto 0);begincoun t:process(c

16、lk_c nt)beginif(risi ng_edge(clk_cnt)the n if(data 1="1001")the n data1<="0000"else if(data2="1001")the n data2<="0000" data1<=data1+1;else if(data3="1001")the n data3<="0000" data2<=data2+1;else if(data4="1001")the

17、 n data4<="0000" data3<=data3+1;else data4<=data4+1;end if;end if;end if;end if;end if;end process count;sel1<=data1;sel2<=data2;sel3<=data3;sel4<=data4;end behav;vQV»iu n Hi口兰加“2 £ T 士32*Jh. n I?血_9»OHbZd叵fhil«ll*i| I He 12 hi 工应 1h 3te 14U- J 5rit

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19、244;89:231;2: 137;46:245;90:229;3: 141;47:246;91:227;4: 144;48:247;92:225;5: 147;49:249;93:223;6: 150;50:250;94:221;7: 153;51:250;95:219;8: 156;52:251;96:216;9: 159;53:252;97:214;10: 162;54:253;98:212;11: 165;55:254;99:209;12: 168;56:254;100:207;13: 171;57:255;101:204;14: 174;58:255;102:202;15: 177;

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