摩根士丹利-亚太科技：人工智能供应链：解答英伟达GPU-LPU与谷歌TPU相关问题-AI Supply Chain：Addressing Questions on Nvidia GPU-LPU and Google TPU-20260409

MorganstanleyRESEARCH

April9,202605:00PMGMT

Asia-PacificTechnology|AsiaPacific

AISupplyChain:Addressing

QuestionsonNvidiaGPU/LPUandGoogleTPU

TSMC'sCoWoS-ListhekeypackagingsolutionforNvidia'sRubinUltrafour-diepackageandGoogle's2nmTPU(HumuFish).Ifthetechnicalissuecannotberesolvedfortheselarge-reticlechips,Intel'sEMIB-TmaytakemarketsharefromTSMCatGoogle's

2nmTPUandotherASICprojects.

Next-generationAIGPU/ASICchipsaregettinglarger,andthatcreatessome

technicalandevenfoundrysourcingdebates:Specifically,investorsareasking:1)willNvidia’sRubinUltrabetwoorfourdiesperpackage?2)WillGoogle’s2nmTPU(HumuFish)useIntel’sEMIB-TorTSMC’sCoWoS-L,givenitsnine-reticledesign?Inourview,bothboildowntowhetherCoWoS-Lcancost-effectivelysupportthenine-reticlechipdesign,whichincludesfourcomputingdies(eachisonereticlesize),twoI/Odies,and8-10HBMchips.

Ourthoughtsonchippackagingtrend–TSMCCoWoSremainsthebetterchoiceforlargechips:Atlastweek’sSiliconPhotonicsseminar,wesawninereticleson

TSMC’sCoWoSroadmapfor2027,sothereiscertainlytechnologyviability.One

interposerwafercansqueezeinfourchipsofninereticles,soTSMC'sCoWoS

solutioncostsshouldbereasonableforthe2nmGoogleTPU.Indeed,performanceandreliabilityarebetterforCoWoSthanIntel’sEMIB-T,butTSMCstillneedsto

resolveinterposerwarpageandrelatedissues.Asoftoday,itisstillundecided

whetherRubinUltrawilladoptatwo-dieorfour-dieconfiguration.Anyhow,RubinUltrabeingtwoorfourdiesperpackagedoesn’tmeaningfullychangeNvidia's

consumptionofTSMCwafercapacityorASE/KYECpackaging/testingassumptions,givensimilarsemicontent.However,therecouldbesomeminordifferencesinchips'thermaldesign,andtheCPOadoptionforthebetween-racksscale-up.

OurthoughtsonBroadcomxGoogleannouncement–implicationsfor

MediaTek’sTPUopportunity:WhilethisprovokessomedoubtsaboutMediaTek'sstrategicpositionintheTPUsupplychain,thisdoesn’tchangeourpositiveviewonits3nmTPU(ZebraFish).Fromourchiptestingsupplychainchecks,Itisontimeformassproductionin2H26,andourassumptionof400kunits(orUS$1.6bnin

revenue)for2026shouldbesolidlyachievable.Moreover,weturnoptimisticaboutMediaTek’sABFsubstratesupplyin2027,andreiterateourStreet-highassumptionof2.5mnunitsin2027,contributingUS$10bnrevenue.ReiterateOW.Pleasesee:

•Exhibit9forGWvs.chipvolumecalculation,whichincludesrecentdeals:OpenAI2GWforAWSTrainium,3.5GWforGoogleTPU.

•Nextsection:TSMC’sfoundryopportunitiesinLPUandHBM4ebasedies.

•Exhibit10forTSMC'sSoICcapacity,production,anddemandupdate.

IDEA

MoRGANSTANLEyTAiwANLimiTEd+CharlieChan

EquityAnalyst

Charlie.Chan@

+88622730-1725

DanielYen,CFA

EquityAnalyst

Daniel.Yen@

+88622730-2863

MoRGANSTANLEyAsiALimiTEd+DaisyDai,CFA

EquityAnalyst

Daisy.Dai@

+8522848-7310

MoRGANSTANLEyTAiwANLimiTEd+TiffanyYeh

EquityAnalyst

Tiffany.Yeh@

+88627712-3032

LucasWang

ResearchAssociate

Lucas.Wang@

+88622730-2875

MoRGANSTANLEyAsiALimiTEd+EthanJia

ResearchAssociate

Ethan.Jia@

+8523963-2287

MorganStanleydoesandseekstodobusinesswith

companiescoveredinMorganStanleyResearch.Asaresult,investorsshouldbeawarethatthefirmmayhaveaconflictofinterestthatcouldaffecttheobjectivityofMorganStanley

Research.InvestorsshouldconsiderMorganStanley

Researchasonlyasinglefactorinmakingtheirinvestmentdecision.

Foranalystcertificationandotherimportantdisclosures,refertotheDisclosureSection,locatedattheendofthisreport.

+=Analystsemployedbynon-U.S.affiliatesarenotregisteredwithFINRA,maynotbeassociatedpersonsofthememberandmaynotbesubjecttoFINRArestrictionson

communicationswithasubjectcompany,publicappearancesandtradingsecuritiesheldbyaresearchanalystaccount.

2

Morganstanley

RESEARCH

IDEA

AddressingfiveinvestorquestionsontheAIsemisupplychain

Inthepastweek,herearefivefrequentlyaskedquestionsaboutAsia'sAIsemisupplychain:

1.NvidiaRubinUltra–twoorfourdiesperpackage:doesitreallymatter?

2.Whichfoundry(SamsungorTSMC)canbenefitfromNvidia'sLPUdemand?

3.WillSamsung'sfutureHBMbasediealsoturntoTSMC3nm?

4.BroadcomxGoogleannouncement,anyimplicationsforMediaTek’sTPUopportunity?

5.Whatdoesnewlyannouncedpowercapacitymeanforchipvolume?

Belowisourdetailedanalysis.

1)NvidiaRubinUltra–twoorfourdiesperpackage:doesitreallymatter?

Atthisyear’sGTC,NVIDIA(coveredbyJoeMoore)extendeditsdatacenterproduct

roadmapthrough2028toincludethreehardwaregenerations,beyond2026,including

RubinUltrain2027.Seemorein

GreaterChinaSemiconductors:AISupplyChainTracker:

KeyInvestorFeedbackfromGTC/OFC(23Mar2026).

InvestorsareaskingwhetherNvidia’sRubinUltrawillbetwoorfourdiesperpackage–therecouldbesomeminordifferencesinchips'thermaldesign.Also,theGPUdensityoftheserverrackwouldaffectCPOadoptionforthebetween-racksscale-up.

Inourview,bothboildowntowhetherCoWoS-Lcancost-effectivelysupportthenine-

reticlechipdesign,whichincludesfourcomputingdies(eachisonereticle),twoI/Odies,and8-10HBMchips.PerformanceandreliabilityarebetterforCoWoSthanIntel’sEMIB-T,butTSMCstillneedstoresolveinterposerwarpageandrelatedissues.

Atlastweek’sSiliconPhotonicsseminar,wesawninereticlesonTSMC’sCoWoSroadmapfor2027,sothereiscertainlytechnologyviability.Anyhow,RubinUltrahavingtwoorfourdiesperpackagedoesn’tmeaningfullychangeNvidia'sconsumptionofTSMCwafer

capacityorASE/KYECpackaging/testingassumptions,givensimilarsemicontent.

However,whetherGoogle’s2nmTPU(HumuFish)willuseeitherIntel’sEMIB-TorTSMC’sCoWoS-L–orboth–isalsounderevaluation.

Morganstanley

RESEARCH

IDEA

Exhibit1:NVIDIA'sproductroadmapinthecomingyears

Source:NVIDIA

Exhibit2:WillNvidia'sRubinUltrabetwoorfourdiesperchip?ItwoulddependonTSMC'sCoWoStechnologyviability

Source:Nvidia

Exhibit3:TSMC'sCoWoScansupportupto9.5reticles,orfourchipsperwafer

Source:MorganStanleyResearch

MoRGANSTANLEyREsEARcH3

4

Morganstanley

RESEARCH

IDEA

Exhibit4:Intel'sEMIBcaneasilysupportlargerchipswthmoreretricles(>12)ifitssupplychaincanexecutewell

Source:Intel

Exhibit5:Intel'sEMIB-T(newarchitecture)embedssiliconbridgesfeaturingverticalcopperconnections(TSVs)intoorganicsubstrates,enablingsuperiorpowerdelivery,reducednoise,andhigh-speedHBM4memoryintegration

Source:Intel

2)Whichfoundry(SamsungorTSMC)canbenefitfromNvidia'sLPUdemand?

TheNVIDIAGroq3LPUissetfor2H26inliquid-cooledLPXracks,featuring256LPUswith128GBon-chipSRAMand640TBpsscale-upbandwidth.Theracktargetslow-latencyAIinference.The"prefill"stage,whichrequiresmassivevideomemory,ishandledbyeither

theCPXannouncedlastyearortheRubinGPU,whilethelatency-sensitive"tokendecoding"stageisassignedtotheGroqLPU.

MoRGANSTANLEyREsEARcH5

Morganstanley

RESEARCH

IDEA

InvestorswereespeciallycuriousabouttheLPUfoundrysupplychain.Currently,LP30ismanufacturedinSamsungfoundry7nm.OurcheckssuggestthatstartingwithLP35(4nm)alongsideRubinUltrain2027,Nvidiamaydual-sourceatTSMCandSamsung.LP40(likely3nm)withFeynmanin2028mayadoptdiscreteSRAMandSoIC3DstackingatTSMC.ForSoICcapacity,weexpect14kwpmin2026and28kwpmin2027,risingto45kwpmin

2028e..

Exhibit6:NVIDIAGroq3LPUchiparchitecture

Source:NVIDIA

Exhibit7:NvidiaunveilstheGroq3LPUwithaviewtounloadingthedecodingburdenforGPU

Source:NVIDIA

3)WillSamsung'sfutureHBMbasediealsoturntoTSMC3nm?

Theshortanswerisyes.BecauseHBM4e/HBM5basediesrequireextensivecustomizationandIPsupport,webelieveTSMC’s3nmwillbecomeanimportantglobalHBMbasedie

nodein2028.Insum,AImemory(SRAMandHBMbasedies)willbecomeastrongTSMCgrowthdriverstartingin2028.Recently,wepickedupfromtheequipmentsupplychain

6

Morganstanley

RESEARCH

IDEA

thatTSMCwillconvertafurther10k-20kofits4/5nmcapacityto3nmatFab18Phase3,preparingforstrongAIdemand,includingbutnotlimitedtothefuturecustomHBM4eandHBM5basediefromKoreanHBMvendors.

4)BroadcomxGoogleannouncement–anyimplicationsforMediaTek’sTPUopportunity?

WhilethisprovokessomedoubtsaboutMediaTek'sstrategicpositioninTPUsupplychain,thisdoesn’tchangeourpositiveviewonMediaTek’s3nmTPU(ZebraFish).

Fromourchiptestingsupplychainchecks,Itisontimeformassproductionin2H26,andourassumptionof400kunits(orUS$1.6bninrevenue)for2026shouldbesolidly

achievable.

Ourcheckssuggestthatthe3nmTPUisundergoingECO(EngineeringChangeOrder)forafewmetallayersbecausepowerconsumptionisrunningslightlyhigherthanexpected.However,ourrecentchecksalsoshowthatdoesn'tdelaythemassproductiontiming,

becauseGoogleistesting/validatingitsimultaneously.Inmassproduction(themiddleof2H26),thereshouldbeanewsetofphotomasksthatincorporatethedesignchange,andthechipperformance/qualityshouldbemorestable.

Moreover,weturnoptimisticaboutMediaTek’sABFsubstratesupplyin2027,andreiterateourStreet-highassumptionof2.5mnunitsin2027,contributingUS$10bnrevenue.

Exhibit8:OurGoogleTPUvolumeforecastsforAsiafromCoWoSandMorganStanleyAsiaestimates(supplychain-based)

kUnits

2023

2024

2025e

2026e

2027e

2028e

v5

500

2,400

250

v6(Trillium)

1,000

v7(Ironwood/Sunfish,byBroadcom)

500

3,200

3,500

3,500

v8(Zebrafish;3nm,byMediaTek)

400

2,500

2,500

v9(Pumafish;2nm,byBroadcom)

500

v10(Humufish;2nm,byMediaTek)

500

Total

500

2,400

1,750

3,600

6,000

7,000

Source:MorganStanleyResearch(e)estimates

5)Whatdoesnewlyannouncedpowercapacitymeanforchipvolume?

LastOctober,wepublishedanAItrackertryingtoreconcilethestrongAIinfrastructureplanwithTSMC'sprudentCoWoSexpansion.Recently,we'veseenmorenew

announcementsforcomputingpowerdeployment,including

AWS-OpenAI

2GWandthenewlyannouncedGoogle/Broadcom2.5GWdeal.

OuranalysisshowsthattotalimpliedCoWoSconsumptionforTSMCstandsat953k

wafersandfront-end2/3nmwaferconsumptionof652kduringthewholelife-cycleofthedeal.ByassumingthatboththeOpenAI-NVIDIAandOpenAI-AMDcontractswillbe

realizedinthreeyearsandothersstickwiththeannouncedplans,weexpect2027annualCoWoSdemandfromtheseprojectswouldbe259kforTSMC,whichwethinkis

achievablebecauseTSMCplanstofurtherexpanditstotalCoWoScapacityto160-170kwpmbytheendof2027e.

Wedon’tthinkpoweristheconstraintforTSMC’schipdemand,atleastfor2027,butABF

MoRGANSTANLEyREsEARcH7

Morganstanley

RESEARCH

IDEA

substrateandHBMsupplyaremajorgatingfactors.

Exhibit9:AnnouncedPowerDeploymentImplicationsforTSMC

AnnouncedPowerDeploymentImplicationforTSMC

GPU/ASICVendor

PowerDeployed(GW)

NVIDIA(OpenAI)

10

AMD(OpenAI)

6

Broadcom

3.5

AWS(OpenAI)

2

Rackname

VeraRubinNVL144

Helios

TPU

Trainium3UltraServers

PowerconsumptionperRack(kW)

220

220

63

144

RackNumber(kunits)

45

27

56

14

ChipName

RubinGPU

MI455GPU

TPUv7(Ironwood)

TPUv8ax(Sunfish)

Trainium3(4)

ChipVolume(kunits)

3,273

1,964

3,571

2,000

LifeCyclefortheproject

3

3

5

8

Impliedlife-cycleCoWoSVolume(kwafers)

409

166

260

118

Impliedlife-cycle2/3nmwaferVolume(kwafers)

260

95

190

107

2027annualCoWoSdemand(kwafers)

136

55

52

15

Source:Companydata,MorganStanleyResearchestimates;note:estimatesarecompiledusingourAsiasupplychainchecks;note:Weassume64unitsofTPUchipsperrackwithTPUv7andv8axperchipTDPbeing~980W.

8

Morganstanley

RESEARCH

IDEA

GlobalSoICandCoWoSCapacityUpdate

UpdatesonSoICcapacity

Inourpreviouslypublishedreport

GreaterChinaSemiconductors:TheFoundryFloorplan:

RaiseTSMC's2027eand2028eCapex(9Mar2026),

weindicatedthatSoICexpansionwillbeakeyfocusareaforTSMCincomingyears.

Previously,weexpectedTSMCtobuilditsSoICcapacityto14kwpmbytheendof2026eandfurtherincreaseitto28kwpmin2027e.OursupplychaincheckssuggestthatTSMChasraised2027ecapacityfrom28kwpmto45kwpm,andto78kwpmin2028e.This

includescapacitybuildsinMiaoliandChiayiAP7,andinArizona,whichwillstartin2028.

However,becauseoverallequipmentqualificationtakeslongerforSoICthanCoWoS—roughlysixmonthsormore—itwouldlowerconversionfromcapacitytoproduction.Weseeproductionat10kwpm,30kwpm,and60kwpmin2026e,2027e,and2028e.

CurrentcustomersadoptingSoICinclude:

•NVIDIA:weexpectannualSoICconsumptionof6kin2026e,risingto120kin

2027e.ThisincludesdemandforCPO'sCOUPE.Wealsoseemorecluesthat

NVIDIA'snext-generationGPUFeynmanwouldrequire1-2GBofSRAMstackedoneachdiewithintheFeynmanpackage.Ontheotherhand,wealsoseeNVIDIA

studyingGPU-to-GPUstacking,whichalsotranslatestoSoICdemand.

•AMD(coveredbyJoeMoore):AMDadoptsSoIConitsAIandgamingGPUandhigh-endCPU,andwedonotruleoutfutureadoptionforitsASICbusiness.WeexpectAMD'sSoICconsumptionat42kin2026e,increasingto60kin2027e.

•Apple(coveredbyErikWoodring):Apple'sdatacenterandMacProchipsrelyonSoIC.WeexpectApple'sSoICconsumptionat36kin2026e,increasingto60kin2027e.

•Others:WeseeseveralcustomersnowtryingTSMC'sSoICcapacity,including

Broadcom,Qualcomm,AWS,andmore.Wethinkthisisinlinewithour

understandingthatBroadcomwouldstarttointroduceSoICpackagingforits

networkingchipsandASICsolutions.Althoughsomeappearstillinthedesignandtrialstageandnotyetfinalized.

MoRGANSTANLEyREsEARcH9

Morganstanley

RESEARCH

IdeA

Exhibit10:TSMCSoICcapacity:weproject2026eand2027ecapacityat14kwpmand28kwpm

TSMCSoICSupplyCapacityBreakdown(ByYearEnd)

(kwpm)

78

60

2028e

TSMCSoICCapacityTSMCSoICProduction

45

30

2027e

6.6

5

2025

1410

2026e

20232024

Source:Companydata,MorganStanleyResearchestimates

Exhibit12:TSMCSoICdemandbreakdownbycustomerSoICdemandbreakdown

(kwafers)

6

NVIDIAAMDAppleOthers(e.g.Qualcomm,

Broadcom)

2026e2027e

84

36

60

36

60

42

156

Source:Companydata,MorganStanleyResearchestimates

CoWoScapacityExhibit13:CoWoScapacity:TSMCandnon-TSMCcamp

CoWoSSupplyCapacityBreakdown(ByYearEnd)

(kwpm)

165

80

2027e

300

250

200

150

100

50

0

120

502026e

Non-TSMC(Amkor/UMC/ASE)TSMC

70

23

2025

32

6

2024

153

2023

120

2022

Source:Companydata,MorganStanleyResearch(e)estimates.Note:EstimatesarecompiledusingourAsiansupplychainchecks.

Exhibit11:TSMCSoICdemandbreakdownSoICdemandbreakdown

(kwafers)

400

350

300

250

200

150

100

50

0

2026e2027e

NVIDIAAMDAppleOthers(e.g.Qualcomm,Broadcom)

Source:Companydata,MorganStanleyResearchestimates

Exhibit14:GlobalCoWoSconsumption,bycustomer

(kwafers)

GlobalCoWoScapacitydemandbykeycustomer

1,600

1,400

1,200

1,000

800

600

400

200

0

202320242025e2026e

NVIDIABroadcomAMDXilinxAWS/AnnapurnaAWS/AlchipMarvellGUCMediaTekOthers

Source:Companydata,MorganStanleyResearch(e)estimates.Note:EstimatesarecompiledusingourAsiasupplychainchecks.

10

Morganstanley

RESEARCH

IDEA

Exhibit15:GlobalCoWoSdemandY/Ygrowthprofile

Y/Y

2023

2024e

2025e

2026e

NVIDIA

119%

280%

113%

106%

Broadcom

56%

191%

25%

241%

AMD

485%

470%

50%

83%

AWS+Alchip

71%

(69%)

500%

IntelHabana

29%

(100%)

Marvell

(22%)

1438%

(17%)

147%

GUC

(15%)

300%

600%

Others

23%

(49%)

90%

(21%)

Totaldemand

95%

216%

87%

112%

Source:Companydata,MorganStanleyResearch(e)estimates.Note:EstimatesarecompliedusingourAsiasupplychainchecks.

Exhibit16:CoWoS:Capacitybreakdown

(kwpm)

1-023

20232024

TSMCCoWoS-STSMCCoWoS-L

14

10

40

20

2025

TSMCCoWoS-R

25

5

20

25

80

20

2026e

200

180

160

140

120

100

80

60

40

20

-

Non-TSMCCoWoS-SNon-TSMCCoWoS-LNon-TSMCCoWoS-R

Source:Companydata,MorganStanleyResearch(e)estimates.Note:EstimatesarecompiledusingourAsiasupplychainchecks.

Exhibit17:CoWoS:ChiponWafer(interposer)onSubstrate

Source:TSMC

Exhibit18:

AIHBMconsumption:upto32bnGbin2026

AIchipvendor

Productname

CoWoScapacityallocation(kwafers)

Chipsper

CoWoSwafer

Impliedshipments(k)

HBMchipdensity(GB)

HBMchipunits

TotalHBMsize(GB)

HBMgeneration

HBMvendor

TotalHBMdemand(kGB)

AIGPU(2026e)

NVIDIA

B300

390

14

5,460

36

8

288

HBM3e12hi

Hynix/Micron/Samsung

1,572,480

RubinR200

260

8

2,080

36

8

288

HBM4

Hynix/Micron/Samsung?

599,040

H200

75

27

2,025

24

6

141

HBM3e8hi

Hynix

285,525

AMD

MI300

3

12

36

24

8

192

HBM3

Samsung

6,912

MI350/375

7

12

84

36

8

288

HBM3e12hi

Samsung/Micron

24,192

MI400

65

10

650

36

12

432

HBM4

Samsung/Micron

280,800

AIASIC(2026e)

Google

TPUv7p(Ironwood)

145

16

2,320

24

8

192

HBM3e8hi

Hynix/Samsung

445,440

TPUv7e(Sunfish;AVGO)

80

12

960

36

8

288

HBM3e12hi

Hynix/Samsung/Micron

276,480

TPUv8(Zebrafish;MediaTek)

30

20

600

36

6

216

HBM3e12hi

Hynix/Micron

129,600

AWS

Trainium2.5

20

16

320

24

4

96

HBM3e8hi

Hynix/Samsung/Micron

30,720

Trainium3

80

17

1,360

36

4

144

HBM3e12hi

Hynix/Samsung/Micron

195,840

Microsoft

Maia200

4

29

116

16

4

64

HBM3

Samsung

7,424

Maia300

5

11

55

36

8

288

HBM4

Samsung

15,840

Meta

MTIA3(Iris)

15

10

150

36

8

288

HBM3e12hi

Hynix/Samsung

43,200

OpenAITotal

Nexus(Titan1)

10

1,434

13

130

20,016

36

6

216

HBM4

Hynix

28,080

3,942,725

TotalHBMdemand(mnGb)31,542

Source:Companydata,MorganStanleyResearch(e)estimates.Note:EstimatesarecompiledusingourAsiasupplychainchecks.

MoRGANSTANLEyREsEARcH11

Morganstanley

RESEARCH

IDEA

Exhibit19:AIwaferconsumption:uptoUS$27bnin2026

AIchipvendor

AIGPU(2026e)

Productname

CoWoScapacityallocation(kwafers)

Chipsper

CoWoSwafer

Impliedshipments(k)

Computedie

size

Geometry

Computedieunits

Waferconsumption(kwafers)

Waferprice(US$)

Waferrevenue

TAM(US$mn)

B300

390

14

5,460

850

4nm

2

433

21,945

9,510

NVIDIA

RubinR200

260

8

2,080

850

3nm

2

165

26,000

4,292

H200

75

27

2,025

814

4nm

1

57

21,945

1,243

AMD

MI300

3

12

36

110

5nm

8

1

18,000

19

MI350/375

7

12

84

110

3nm

8

2

26,000

64

MI400

65

10

650

110

2nm

8

32

28,125

886

AIASIC(2026e)

Google

TPUv7p(Ironwood)

145

16

2,320

700

3nm

2

152

26,000

3,942

TPUv7e(Sunfish;AVGO)

80

12

960

800

3nm

2

72

26,000

1,864

TPUv8(Zebrafish;MediaTek)

30

20

600

800

3nm

2

45

26,000

1,165

AWS

Trainium2.5

Trainium3

20

80

16

17

320

1,360

600

700

5nm

3nm

2

2

12

73

20,000

26,000

237

1,886

Microsoft

Maia200

Maia300

4

5

29

11

116

55

700

850

3nm

2nm

1

1

3.0

2.9

26,000

28,125

79

82

MetaMTIA3(Irism211.926,000310

OpenAINexus(Titan1)10131307503nm418.226,000473

Total1,43420,0161,08426,159

Source:Companydata,MorganStanleyResearch(e)estimates.Note:EstimatesarecompiledusingourAsiasupplychainchecks.

12

Morganstanley

RESEARCH

IDEA

AIsemis–stockimplications,P/Emultiples,revenueexposure

•InAsiansemis,weareOWonTSMC,KYEC,ASE,SamsungandAspeed.

•WearealsopositiveonAsianASICdesignserviceprovidersAlchipandGUC,andCPOsuppliersFOCIandHimax.

Exhibit20:P/EmultipletrendofAIsemis(x)

50

40

30

20

10

Nov-22Feb-23May-23Aug-23Nov-23Feb-24May-24Aug-24Nov-24Feb-25May-25Aug-25Nov-25Feb-26

GPGPU(NVIDIA)AlternativeAISemisAISemiEnablers

AlternativeAIsemisgroup:AMD,Alchip,Andes,Marvell,Broadcom.AIsemienablersgroup:TSMC,Synopsys,Cadence,ASML,BESI,Ibiden,

KYEC,Advantest.Source:Companydata,MorganStanleyResearch.

Exhibit21:WecontinuetoseeAIchipquarterlyrevenueincreasing

80,000

70,000

60,000

US$mn

50,000

40,000

30,000

20,000

10,000

0

Datacenter/HPCsemirevenue:NVIDIA+AMD

1Q14

3Q14

1Q15

3Q15

1Q16

3Q16

1Q17

3Q17

1Q18

3Q18

1Q19

3Q19

1Q20

3Q20

1Q21

3Q21

1Q22

3Q22

1Q23

3Q23

1Q24

3Q24

1Q25

3Q25e

1Q26e

3Q26e

300%

250%

200%

150%

100%

50%

0%

-50%

NVIDIAAMDDatacenter/HPCsemisalesY/Y(RHS)

Source:Companydata,Refinitiv,MorganStanleyUSResearch(e)estimates.

MoRGANSTANLEyREsEARcH13

Morganstanley

RESEARCH

IDEA

Exhibit22:GreaterChinaAIsemirevenueexposureasof2025e

Source:MorganStanleyResearch(e)estimates

Exhibit23:TSMCAI-relatedrevenueCAGRcouldreach60%from2024eto2029e

TSMCAIrevenuebreakdown

US$bn

140

120

100

80

60

40

20

0

2021202220232024e2025e2026e2027e2028e2029e

General-purposeAICustomAIchips(ASICs)CoWoS/wafertestAIserverCPU

Source:Companydata,MorganStanleyResearch(e)estimates

AIGPUandASICrentalpricetracker

Exhibit24:AIGPUH100perGPUperhourasofend-March

GCPH100(A3-HIGH)AWSH100(p5.48xlarge)$9.00

$8.00

$7.00

$6.00

$5.00

$4.00

$3.00

$2.00

$1.00

$0.00

Source:Companydata,MorganStanleyResearch

14

Morganstanley

RESEARCH

IDEA

Exhibit25:AIASICequivalentcomputingpower–16xInferentia2perhour

16xTranium(trn1n.32xlarge)$30

$25

$20

$15

$10

$5

$0

Source:Companydata,MorganStanleyResearch

Exhibit26:NVIDIA5090graphiccardspricingreboundedrecently,mainlybecauseofpricehikeexpectationsinthemarketandstrongAIinferencedemandfromChina

NVIDIAgaminggraphiccardpriceinChina

35,000

30,000

25,000

20,000

15,000

10,000

4090DistributorpriceonTaoBao(Rmb)5090DDistributorpriceonTaoBao(Rmb)

4090Tagprice(Rmb)

5090/5090DTagprice(Rmb)

Source:TaoBao,MorganStanleyResearch,variousmedia(e.g.,

Vice,Jan.3,2026)

MoRGANSTANLEyREsEARcH15

Morganstanley

RESEARCH

IDEA

KeyFeaturedReportsontheAISupplyChain

GreaterChinaSemiconductors:AISupplyChainTracker:KeyInvestorFeedbackfromGTC/

OFC(23Mar2026)

AsiaTechnology:AISupplyChain:CPOandASICDynamicUpdate(3Mar2026)

Asia-PacificTechnology:AISupplyChain:CESimplications,ASICproduction,ChinaAIchips

(6Jan2026)

Asia-PacificTechnology:AISupplyChain:TSMCCoWoSExpansion;ASICDynamics;Asia

FieldTrip(1Dec2025)

GreaterChinaSemiconductors:2026CoWoSExpansiontoCatchUpAfterTSMC's3nm

CapacityIncrease(17Nov2025)

Asia-PacificTechnology:AISupplyChain:TSMCtoexpand3nmcapacityformajorAI

customer'sgrowth?(12Nov2025)

Foundation

GlobalTechnology:Supply-chainReorientation(24Jul2025)

GlobalTechnology:China–AI:TheSleepingGiantAwakens(13May2025)

GlobalTechnology:AICloudCapexintheSpotlight(26Feb2025)

GlobalSemiconductors:AIASIC2.0:Potentialwinners(15Dec2024)

GlobalTechnology:GlobalTechnology–DawnoftheAISmartphoneEra:EdgeAI–Apple

IntelligenceFuelsInnovation–MoreCharts,FewerWords(17Jul2024)

GlobalTechnology:AIPCsToUsherInTheNextLegOfPCMarketGrowth(21May,2024)

GlobalSemiconductors:WindowsonArmAIPC–ThisTimeisforReal(7May2024)

KeyUpstre