三维集成技术的挑战与解决方案

三维集成技术的挑战与解决方案

前子区域的电子分销市场是当前的sec区域的开发，它被推迟到了中日战争中的竞争，以

减少财政资源，以分散的嗷格式监管机构。在同一情境中，佳组件将被送到最小区域，而

不是正输入信息。

Todaydifferent3Dpackagingapproaches1ikeSiP(SysteminPackage),SoC

(SystemonChip)andSoP(SystemonPackage)havebeendevelopedinorderto

answertherequirementsforsmallerfootprint,shorterinterconnectsand

higherperformance.

SiP“SysteminaPackagewisafunctionalsystemorsubsystemwithmultiple

wire-bondedorflip-chipdiesinanICpackage.Othercomponentsarcplacedon

themotherboard,likepassives,SAW/BAWfilters,pre-packagedICs,connectors

andmicromochanicalparts.Thistechnologyenablesastackedchippackagewith

reducedformfactor.

SoC(SystemonChip)integratesallthedifferentfunctionalblocks,like

processor,embeddedmemory,logiccoreandanaloginamonolithicway.These

blocksarerequiredtointegratethesystemdesignonasinglesemiconductor

chip.SoCdesignsusuallyconsumelesspowerandhavealowercostandhigher

reliabilitythanthemulti-chipsystemsthattheyreplace.Andwithfewer

packagesinthesystem,assemblycostsarereducedaswe11.

SoP(SystemonPackage)usesthrough-viasandhighdensitywiringinorderto

achieveahigherminiaturization.Itisanemergingmicroelectronicstechnology

thatplacesanentiresystemonasinglechip-size

package.Where“systems“usedtobebulkyboxeshousinghundredsofcomponents,

SoPsavesinterconnectiontimeandheatgenerationbyenablingafullsystem

withcomputing,communications,andconsumerfunctionsallinasinglechip

ThroughSiliconVia(TSV)hasevolvedasoneofthekeytechnologiesfor3D

integrationandwaferlevelpackaging.3DTSVhasthepotentialtooneday

replacewirebondingandthusenablefurthersizeandcostreduction,whichis

oneofthebiggestchailenges,andincreasetheperformanceofthedevice.

Todciy3DTSVtechnologyhasbecomecriticciltothegrowthof3Dcomponents

integration,likememorystacking,orforMEMSstructurepackaging.Thefirst

applicationwhichisusingtheTSVasmainstreamtechnologyisthepackaging

ofCMOSimagesensors(CIS).ForCMOSimagesensars,WLPisalreadyan

industrialreality.Today,alreadyabout35%ofCMOSimagersensorscanbefound

intolatestconsumercell-phonesandnotebookcanerasareencapsulatedina

WL-CSPandthisnumberkeepsgrowing(Fig.1.)

1u3000ethsmaskmostbecoating

OneofthetypicalprocessflowstoformTSVsisshowninFig.2.Thesesteps

arerequiredforthroughsiliconviawaferprocessing.First,theetchmask

mustbecreated.Thisinvolvescoating,exposinganddevelopingthemask.Once

themaskiscreated,theviascanbeetchedandinsulated.Viafillingcanthen

becompletedusingvariousmaterialssuchascopperandtungsten.Thefill

processisdeterminedbythefillmaterials.Asoftoday,copperisthemost

commonlyusedmaterialforTSVs,butothermaterialslikeTungsten(W)or

Cu3Snalloyareusedaswell.

2生产中心

2.1u3000unizactinvi生物一ExposureandDevelopment

Photolithographyofviaopeningsinphotoresistlooksprettystraight

forward.However,thevariousfollowingprocessstepsanddifferentviasizes

requirespecificphotoresistexposureanddevelopmentconditionsandaskfor

anoptimizedsetofparameters.

Typicallyviasizesdownto5um(Fig.3)canbeeasilyandcosteffectively

achievedbyIXfullfieldphotolithography.State-of-the-artresolutionlimits

areatabout3uminproximityprintingon300nnisubstrates.However,tightCD

controlofviaopeningsrequiresaccurategapsetting,excellentlight

uniformityandexposuredosecontrol.Allthiswillaffectthefinalexposure

resultsandthereforeneedtobeaccuratelycontrolled.

Forthedescribedexperimentatypicalviatestnaskhavingdifferentvia

diameterswasused.TheSUSSMA300Gen2MaskAlignerprovidesanaverage

intensityofabout90mW/cm

ThedevelopmentprocesswasagaincarriedoutontheACS300Gen2usingan

aqueousdevelopmodulethatwasequippedwithabinaryspraydispense

system.Thebinaryspraynozzlesetupandwater-jacketeddispenselinowith

temperaturecontroltopoint-of-useallowforreducingprocesstimesand

minimizingmaterialconsumption.Variablerateammovementacrossthewafer

wasemployedinordertooptimizetheuniformityofthesprayprocess.Both,

AZ4110andAZ9260weredevelopedusinga1:4dilutionofAZ400Kanddeionized

water.TMAHbasedAZ726M1FwasusedforthedevelopmentofAZ1505.

Thetrendforsmallerviasalsorequiresaccurateoverlayoftheprint

result.Overallalignmentperformanceofthemaskaligneraswellasrunout

effectsarethetwomainimportantfactorsthatinfluencetheoverlay

result.TheSUSSMA300Gen2usestwonoveltechnologiestoachievehighly

accurateoverlay.

Aligiiincnlaccuraciesbelow0.5pin(3signia)canbeachievedontheMA300Gcn2

byadoptingtheDirectAligntechnology.Firstofall,thesystemaccurately

alignswaferandmaskinalignmentgap,whichistypicallysetto50〜

100um.Thefinalhighaccuracyalignmentstepisperformedinexposure

gap.Advancedpatternrecognitionsoftwaremeasuresandcontrolsthealignment,

thusachievingsub-micronalignmentaccuracy.

Alsoalignmentaccuraciesdownto0.25nmcanbeachievednowusingtheMA/BA8

Gen3Maskaligner.ThenewOperator-assistedalignmenttechnologywith

continuouslyautomaticcalculationofachievedalignment(X,Y,6)between

bothtcirgetsallowsextremealignmentaccuracyassistedbypattern

recognition.DuringmanualalignmenttheCOGNEX

DuringtheexperimenttheThermAlignchuckwassetto22℃.Thealignmentwas

doneusinganautomaticalignmentsystemindirectalignmentmodewithSUSS

proprietaryalignmenttargets.

Theachievedoverlaydataon300mmwaferareshownintable1andthex-y

plotisshowninFig.5.

2.2通过alnci反应表tin,alinciperacunity,alinciper等域的

alincipersonal,vhn.

Oneofthemostimportanttopicsin3DStackingisthealignmentaccuracy.As

canbeseenfromtheroadmapshowninFig.6,thetrendofviasizesisthat

viadiameterswillcontinuetoshrinkoverthenextcoupleofyears.

Todayviadiameterinrangeof25〜75tlmareusedinCMOSImageSensors

devices.InmemorydevicestypicallyfewmicronsdiameterisusedforaTSV.For

thewaferbondingtechnology,shrinkingviadiametershaveadirecteffecton

thepostbondalignmentaccuracythatisrequired.Thereisalwaysaminimum

overlaprequirementsothatmetalviashavegoodelectricalconnectionwith

minimizedresistance.Thisminimumoverlaprequirementdirectlytranslatesinto

post-bondalignmentaccuracy,whichwillbeinthesub-micronrangewithinthe

nextcoupleofyears.

Asbothofthewaferswhichneedtobealignedfor3Dstackinghavemetal

layersIRalignmentbecomesimpossible.AnotherapproachistheInterSubstrate

Alignment.Thistechniqueiscapableofachievingtherequiredalignment

accuraciesoutlinedinFig.6.

Inthisalignmenttechniquespecialopticsareusedthatareinsertedbetween

theIwowafers.TheISAobjectives,onlefIandright,imageIliealignniciilkey

ontheupperandlowerwafersimultaneously.Thealignmentstagemovesthe

wafersandapatternrecognitionalgorithmperformsthealignmentaccordingto

therecipe.

Aftertheobjectivesareretractedbothwafersmoveintocontactortoa

predefinedgap.Typicallymovingthewafersinthez-axiscancreatesome

misalignment.Thereforenewprecisionopticsandmechanicshavebeencombined

withglobalinlinecalibrationmethodstoachievesub-micronalignment

accuracyintheBA300U1IP(UltraHighPrecision)BondAligner.

2.3il果报明整理剂案例5

Waferbondingtechniquesusedfor3DStackingaremainly:

-metaltometaldiffusionbonding(Cu)

-metaleutecticbonding(Cu/Sn)

-siliconfusionbonding

-adhesivebonding(BCB)

Therearealotofprosandconsforeachkindofbondingprocess.Whichone

willbechosendependsontheapplicationanditsrequirements.Howeverthere

isacleartrendformetaltometaldiffusionbondingusingcopperasbond

layer.Theadvantageofthisbondprocessisthattheelectricalaswellas

mechanicalconnectionisdonesimultaneously.

2.4案例5.coviwolgace.coper-aluminum系统copeq/aluminum系统

两需要关于

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Whentwometalsarepressedtogetherunderappliedforceandheal,theatoms

canmigratefromlatticesitetolatticesitebondingtheinterfacetogether

Suchdiffusionprocessesrequireintimatecontactbetweenthesurfacessince

theatomsmovelatticevibration.CopperorAluminumareoptimalforsuch

diffusionprocessesduetotheirductilepropertiesandfastdiffusion

rates.Copperbondingrequirestemperaturesintherangeof300℃upto400℃to

achieveagoodhermeticallysealinterface.Theoxidationofcoppercanhamper

thebondingprocess.Itcanbecrackedbyapplyingahighforceduringthe

bondingortoincorporateavaporcleaningprocesstoremovethesurface

oxidation.Usingthevaporfromformicacid(HCOOH)inabubbler,SUSSMicroTec

hasdevelopedapointofuseremovalsystemfornetaloxides.Wafersareplaced

incleaningchambersandexposedtothevaporforafewminutes.Thechamberis

purgedandbycontrollingthepartialpressureof0

2.5which-eth-si-ausiausi

Eutecticbondingisalsoofinterestfor3Dstackingduetothelow

temperatures,whicharebeginningat23TCforCu3Sn(Fig.7).Thusthemost

oftenrequestedeutecticsareAuSn,AuSi,AlGe,andCuSn,asalready

mention.Italsorequiredtheusageofinertgastopreventoxidation.

2.6u2004ain市直机关wafer-roin

FusionBondingisinterestingfor3Dstackingduototheveryshortprocess

timesandhighbondstrengths.Neverthelessduringthefusionbondingonlythe

mechanicalcontactiscreated.However,therearenodirectelectrical

connectionsacrosstheinterfacetointerconnectthemetallayers.Additional

processingisthereforerequiredtoetchthroughthewaferstackandbackfi11

viaswithmetals.Thisisdonebythinningoneofthesubsti'atestoseveral

tensofmicrometersandfollowbyapatternedct^handmetalbackfillina

processknownas“vialast”processing.

Thedrawbacktofusionbondingistherequirementsforsurfaceflatnessarid

roughness.Anotherissueisthe1imitationintheannealingtemperaturedueto

theusedmetalmaterialsinthewafers.Butusingplasmatreatmentthe

annealingtemperaturecanbereducedfrom〜1000℃downtotherequired200℃〜

400℃.

Siliconfusionbondingneedsthefollowingprocesssteps:

-plasmatreatmentcreatingahydrophilicsurfacewithaspecificchemistryand

conlaclangle

-DTwatercleaningcombinedwithreactivationandbonding

-temperatureannealinginastandardfurnace(batchprocess)

2.7u3000e两nb风险法上的alogening国际习惯法一

AdhesiveBonding

Adhesivebondingisveryoftenusedin31)duetothelowrangeofprocess

temperatureandthetopographytolerance.Themostoftenusedpolymerfor

precision3DadhesivebondingisBCB(benzocyclobutene)andisbondedfrom

150℃〜320℃.TheflowpropertiesofBCBcanbemanipulatedinordertoprovide

lowtemperaturebondingandalignmentaccuraciesintherangeof1〜2Hm.BCB

needstobecoatedononeorbothwafers,theuseofadhesivepromoterAP3000

isabsolutelyessential.BeforebondingtheBCBneedstobebakedout.Ifthe

procuringisbelow150eCnotallsolventsareremoved.Sothebondwillalmost

certainresultinapoormechanicalconnection.

3wafertemperiek-roining网络

mask/waferrecoagityrecoagrange+kras-recoagity第三人temper-

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