DSP28335教程附录5浮点运算单元.ppt

Floating-PointUnit,Copyright2009TexasInstruments.Allrightsreserved.,AppendixETMS320C28xMCUWorkshop,LearningObjectives,Architecturefloating-pointformat,registers,andpipelineInstructionsinstructiontypes,delayslots,parallelinstructions,RPTB,floating-pointflagsInstructionSummary,IEEESingle-PrecisionFloating-PointFormat,*NormalPositiveandNegativeValuesareCalculatedas:(-1)sx2(E-127)x1.M+/-1.7x10-38to+/-3.4x10+38,TheNormalizedIEEEnumbershaveahidden1;thustheequivalentsignedintegerresolutionisthenumberofmantissabits+sign+1,23-bitMantissa(ImplicitLeadingBit+FractionBits),8-bitExponent(Biased),1SignBit(0=Positive,1=Negative),IEEESingle-PrecisionFloating-PointFormat(IEEE754),Mostwidelyusedstandardforfloating-pointStandardnumberformats,Specialvalues(NaN,Infinity)Roundingmodes2pinstructionNOP;1cycledelay;CanuseR2H;,MPYF32R2H,R1H,R0H;2pinstructionNOP;1cycledelayforMPYF32;CanuseR2H;,MPYF32R2H,R1H,R0H;2pinstructionADDF32R3H,R3H,R1H;1cycledelayforMPYF32;-MPYF32completes,R2HvalidNOP;1cycledelayforADDF32;-ADDF32complete,R3Hvalid;,MPYF32R2H,R1H,R0H;2pinstructionADDF32R3H,R3H,R1H;1cycledelayforMPYF32;-MPYF32completes,R2HvalidMOV32*XAR7,R2H;1cycledelayforADDF32;-ADDF32complete,R3Hvalid;,MPYF32R2H,R1H,R0H;2pinstructionADDF32R3H,R3H,R1H;1cycledelayforMPYF32;-MPYF32completes,R2HvalidMOV32*XAR7,R2H;1cycledelayforADDF32;-ADDF32complete,R3Hvalid;-MOV32complete,MathOperations:2p(2pipelined)cyclesCanbelaunchedeverycycleResultisvalid2instructionslater,MoveOperation:1cycle,ParallelInstructions,ADDF32R3H,R3H,R1H|MOV32*XAR7,R3H,SingleInstructionSingleOpcodePerforms2OperationsExample:Add+ParallelStore,ParallelBarsIndicateAParallelInstruction,Note:cycleinformationisgivenforbothoperation,MultiplyandStoreParallelInstruction,MPYF32R2H,R1H,R0H|MOV32*XAR3,R2H,;2p/1instruction;CanuseR2H,;Before:R0H=2.0,R1H=3.0,R2H=10.0MPYF32R2H,R1H,R0H;2p/1instruction|MOV32*XAR3,R2H;CanuseR2H;After:R2H=?*XAR3=?,;Before:R0H=2.0,R1H=3.0,R2H=10.0MPYF32R2H,R1H,R0H;2p/1instruction|MOV32*XAR3,R2H;CanuseR2H;After:R2H=R1H*R0H=3.0*2.0;*XAR3=10.0,MathOperations:2p(2pipelined)cyclesCanbelaunchedeverycycleResultisvalid2instructionslaterMoveOperation:1cycle,ParallelInstruction:MOV32usedthevalueofR2HbeforetheMPY32update,MultiplyandStoreParallelInstruction,;MPYF32R2H,R1H,R0H;2p/1instruction|MOV32*XAR3,R2H;=24LSL64ACC:P,#(GLOBAL_Q-22)/2).endif.ifGLOBAL_QQ+B1Y2=(M2*X2)Q+B2MOVLXT,M1IMPYLP,XT,X1QMPYLACC,XT,X1ASR64ACC:P,#QADDLACC,B1MOVLY1,ACCMOVLXT,M2IMPYLP,XT,X2QMPYLACC,XT,X2ASR64ACC:P,#QADDLACC,B2MOVLY2,ACC;14cycles;32bytes,32-bitFixed-Point,32-bitFloatingPoint,CompilerOptimizedCode,Floating-PointInstructions,*Note:MovebetweenCPUandFPUregistersrequiresspecialpipelinealignment,Floating-PointInstructions,Floating-PointInstructions,Thisinstructionisrepeatable(RPT|),Floating-PointConditionalInstructions,Note:UNCF:Thistestinconditionalope