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MAX706S在DSP系统中的应用陈晓明(武汉高压研究院，湖北 武汉 430074)1 引言 对于实际的DSP应用系统特别是产品化的DSP系统而言，可靠性是一个不容忽视的问题。由于DSP系统的时钟频率比较高，因此在运行时极有可能发生干扰和被干扰的现象，严重时系统可能会出现死机。为了克服这种情况，除了在软件上作一些保护措施外，硬件上也必须作相应的处理。硬件上最有效的保护措施就是采用具有监视(Watchdog)功能的自动复位电路。各大公司生产了多种微处理器监控器，用来监测微处理器的运行状态，一旦微处理器失控就强行复位微处理器，引导程序重新运行。 2 MAX706简介MAX706系列监控器是Maxim公司生产的具有代表性的多功能微处理器监控电路，性能价格比极高。除了看门狗功能外，另外还具有上电自动复位、人工复位以及低电压报警等功能，使用起来非常方便可靠。MAX706是多功能微处理器监控电路，其中包括MAX706、MAX706P、MAX706R、MAX706S和MAX706T等5个型号，具有上电自动复位、手动复位、看门狗以及电压检测功能。可以满足3 V电源系统和5 V电源系统的需要。在系统上电、掉电、复位按键按下以及电源电压降低的情况下，复位比较器能够保证输出准确可靠的复位信号。其内部的看门狗电路能监视微处理器的运行，当1.6 s内输入信号的状态没有改变时将发出复位信号，MAX706内部还有一个独立的门限检测器，该检测器可以监视另一个电源电压，当该电源电压过低时发出电源故障信号。MAX706具有8引脚DIP、SO和MAX三种封装形式可供选用。2.1 MAX706系列主要性能上电自动复位。电源电压超过复位门限以后，复位低电平维持200 ms；具有人工复位输入，复位按键弹起后，复位脉冲维持200 ms；独立的看门狗电路，定时时间为1.6 s；确保在电源低至1.0 V时，复位输出仍有效；MAX706为5.0 V电源，低电平复位输出，复位门限为4.40 V；MAX706P的电源为2.7 V5.0 V，高电平复位输出，复位门限为2.63 V；MAX706R的电源为2.7 V5.0 V，低电平复位输出，复位门限为2.63 V；MAX706S的电源为3.0 V5.0 V，低电平复位输出，复位门限为2.93 V；MAX706T的电源为3.1 V5.0 V。低电平复位输出，复位门限为3.08 V。单片机系统的工作电压为5 V，一般选用器件MAX706作为监控电路。DSP系统中主要工作电压为3.3 V，复位信号为低电平有效。综合以上所述，根据电源电压和复位输出信号，在DSP系统中可选用MAX706S作为监控电路。2.2 MAX706S引脚功能描述MAX706S采用DIP封装，其引脚排列如图1所示。各引脚功能如下：MR：人工复位输入。当输入电压低于0.6 V时，复位比较器输出有效的复位信号。Vcc：电源端。当Vcc低于复位门限电压时，输出有效的复位信号，并且当Vcc 上升至复位门限电压后，复位脉冲维持200 ms。GND：接地端。PFI：门限检测器输入端。当PFI端的输入电压低于1.25 V时，PFO端输出低电平。PFI端不用时可与GND端相连。PFO：门限检测器输出端。当PFI端电压低于比较器门限电压1.25 V时，PFO为低电平，否则为高电平。WDI：看门狗电路输入端。当WDI端信号维持高电平或低电平的时间超过1.6 s时，看门狗定时器溢出，WDO端输出低电平。WDI端的任何一个跳变都使定时器清零。RESET：低电平复位输出端。受MR端和Vcc端控制，当MR端电压低于0.6 V或Vcc端电压低于复位门限电压时，RESET输出低电平复位脉冲。WDO：看门狗电路输出端。当电源低于复位门限或看门狗定时器溢出时，WDO端输出低电平，否则为高电平。3 监控电路在DSP系统中的应用DSP系统中监控电路的使用与单片机系统有差别，以下主要介绍在DSP系统中的应用设计及需要注意的问题。3.1 典型应用设计在DSP系统中，看门狗有两种接法：其一是将WDO至DSP的NMI；另一种接法是将WDO接至MR。在第一种接法中，WDO变低将驱动DSP的最高级中断NMI进行死机处理。由于DSP系统中一般不在外部使用NMI中断，所以第二种方法比较常用。其原理图如图2所示。图中TMS320VC33的某一信号可以是特定的输出信号。也可以是读写信号，驱动WDI引脚。DSP正常工作时，在1.6 s内驱动WDI引脚，DSP不会被复位。如果DSP出现死机，WDO输出低电平至MR，将RESET引脚拉低，那么DSP将复位。此电路在上电时自动复位，电源电压超过复位门限以后，将产生200 ms的复位脉冲。3.2 问题的提出与电路改进开发DSP系统时，必须有DSP开发板和仿真器，实际中可能还需要一些其他外围的元件。仿真器的作用为：将DSP开发板(DSP的JTAG接口)与电脑(并口或USB接口)连接，这样所编写的程序才能写入DSP开发板，以及在计算机上通过软件(CCS软件)调试DSP开发板，开发过程中离不开仿真器。开发软件时，每次调试程序都必须经过JTAG仿真器将程序装载到开发板中，此装载过程时间可能大于看门狗电路的复位时间(1.6 s)。如果采用图2所示电路，则每次装载程序时会出现仿真器连接错误。其原因是装载过程中看门狗启动，将DSP的复位引脚拉低，导致工作失常。为保证DSP系统调试与工作正常，需对原理图作出以下改进具体电路如图3所示。在MR与WDO之间加上一个跳针，在每次加载程序时将跳针断开，关闭看门狗功能；正常运行时将跳针短路，即可实现看门狗的功能。电路中也给出了手动复位、上电复位及掉电复位功能的原理图。4 结束语MAX706S具有功能强大、外围电路简单、使用方便可靠等特点，能有效提高系统的可靠性和抗干扰能力。本文提供了改进的原理图，可以方便地应用于DSP系统中，具有很好的实用价值。MAX705MAX708/MAX813LLow-Cost, P Supervisory Circuits_Maxim Integrated Products1TOP VIEW12348765WDORESET (RESET)WDIPFOPFIGNDVCCMRDIP/SOMAX705?MAX706?MAX813L12348765RESETRESET N.C.PFOPFIGNDVCCMRDIP/SOMAX707?MAX708( ) ARE FOR MAX813L ONLY.?Pin Configurations continued at end of data sheet._Pin ConfigurationsVCCPFIMRPFOWDO?RESETUNREGULATED DCPUSHBUTTON?SWITCHPFII/O LINEINTERRUPTPMAX705?MAX706?MAX813LMAX667+5V DC LINEAR?REGULATORVCCRESETNMI_Typical Operating CircuitCall toll free 1-800-998-8800 for free samples or literature.19-4334; Rev. 5; 9/95_General DescriptionThe MAX705-MAX708/MAX813L microprocessor (P)supervisory circuits reduce the complexity and numberof components required to monitor power-supply andbattery functions in P systems. These devices signifi-cantly improve system reliability and accuracy com-pared to separate ICs or discrete components.The MAX705/MAX706/MAX813L provide four functions:1) A reset output during power-up, power-down, andbrownout conditions.2) An independent watchdog output that goes low ifthe watchdog input has not been toggled within 1.6seconds.3) A 1.25V threshold detector for power-fail warning,low-battery detection, or for monitoring a power sup-ply other than +5V.4) An active-low manual-reset input.The MAX707/MAX708 are the same as the MAX705/MAX706, except an active-high reset is substituted forthe watchdog timer. The MAX813L is the same as theMAX705, except RESET is provided instead of RESET.Two supply-voltage monitor levels are available: TheMAX705/MAX707/MAX813L generate a reset pulse whenthe supply voltage drops below 4.65V, while theMAX706/MAX708 generate a reset pulse below 4.40V.All four parts are available in 8-pin DIP, SO and MAXpackages._ApplicationsComputersControllersIntelligent InstrumentsAutomotive SystemsCritical P Power Monitoring_Featureso MAX Package: Smallest 8-Pin SOo Guaranteed RESET Valid at VCC= 1Vo Precision Supply-Voltage Monitor4.65V in MAX705/MAX707/MAX813L4.40V in MAX706/MAX708o 200ms Reset Pulse Widtho Debounced TTL/CMOS-Compatible Manual-Reset Inputo Independent Watchdog Timer1.6sec Timeout(MAX705/MAX706)o Active-High Reset Output(MAX707/MAX708/MAX813L)o Voltage Monitor for Power-Fail or Low-BatteryWarning_Ordering InformationPARTTEMP. RANGEPIN-PACKAGEMAX705CPA8 Plastic DIPMAX705CSA0C to +70C8 SOMAX705C/D0C to +70CDice*Ordering Information continued at end of data sheet.* Dice are specified at TA= +25C.*Contact factory for availability and processing to MIL-STD-883. 0C to +70CMAX705CUA0C to +70C8 MAXMAX705MAX708/MAX813LLow-Cost, P Supervisory Circuits2_Terminal Voltage (with respect to GND)VCC.-0.3V to 6.0VAll Other Inputs (Note 1) .-0.3V to (VCC+ 0.3V)Input CurrentVCC.20mAGND.20mAOutput Current (all outputs).20mAContinuous Power DissipationPlastic DIP (derate 9.09mW/C above +70C) .727mWSO (derate 5.88mW/C above +70C) .471mWMAX (derate 4.10mW/C above +70C) .330mWCERDIP (derate 8.00mW/C above +70C) .640mWOperating Temperature RangesMAX70_C_, MAX813LC_.0C to +70CMAX70_E_, MAX813LE_ .-40C to +85CMAX70_MJA .-55C to +125CStorage Temperature Range.-65C to +160CLead Temperature (soldering, 10sec).+300CELECTRICAL CHARACTERISTICS(VCC= 4.75V to 5.5V for MAX705/MAX707/MAX813L, VCC= 4.5V to 5.5V for MAX706/MAX708, TA= TMINto TMAX, unless otherwise noted.)Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSOperating Voltage RangeVCCMAX70_C1.05.5VMAX813LC1.15.5MAX70_E/M, MAX813LE/M1.25.5Reset Threshold (Note 2)VRTMAX705, MAX707, MAX813L4.504.654.75MAX706, MAX7084.254.404.5040mVReset Pulse Width (Note 2)tRS140200280msRESET Output VoltageISOURCE= 800AVCC- 1.5VABSOLUTE MAXIMUM RATINGSNote 1: The input voltage limits on PFI and MR can be exceeded if the input current is less than 10mA.Reset Threshold Hysteresis (Note 2)ISINK= 3.2mA0.40.30.3RESET Output VoltageMAX707, MAX708, ISOURCE= 800AVMAX707, MAX708, ISINK= 1.2mA0.40.80.9MAX813LVCC- 1.50.4Watchdog Timeout PeriodtWDMAX705, MAX706, MAX813L1.001.602.25secWDI Pulse WidthtWPVIL= 0.4V, VIH= (VCC) (0.8)50nsWDI Input Threshold0.8V3.5MAX70_C, VCC= 1V, ISINK= 50AMAX70_E/M, VCC= 1.2V, ISINK= 100AMAX813LC, ISOURCE= 4A, VCC= 1.1VMAX813LE/M, ISOURCE= 4A, VCC= 1.2VISOURCE= 800AISINK= 3.2mALowHighWDI Input CurrentMAX705, MAX706, MAX813L, WDI = VCC50150AMAX705, MAX706, MAX813L, WDI = 0V -150-50WDO Output VoltageVCC- 1.5V0.4MAX705, MAX706, MAX813L, VCC= 5VMAX705, MAX706, MAX813L, ISOURCE= 800AMAX705, MAX706, MAX813L, ISINK= 1.2mAVVCC- 1.5MAX707C, MAX708C50350MAX707E/M, MAX708E/M50500Supply CurrentISUPPLYMAX705C, MAX706C, MAX813LC150350AMAX705E/M, MAX706E/M, MAX813LE/M150500MAX705MAX708/MAX813LLow-Cost, P Supervisory Circuits_3ELECTRICAL CHARACTERISTICS (continued)(VCC= 4.75V to 5.5V for MAX705/MAX707/MAX813L, VCC= 4.5V to 5.5V for MAX706/MAX708, TA= TMINto TMAX, unless otherwise noted.)PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS0.8V2.0MR Pull-Up CurrentMR = 0V100250600AMR Pulse WidthtMR150nsLowHighMR Input ThresholdMR to Reset Out Delay (Note 2)tMD250nsPFI Input ThresholdVCC= 5V1.201.251.30VPFI Input Current-25.000.0125.00nAPFO Output VoltageISOURCE= 800AVCC- 1.5VISINK= 3.2mA0.4Note 2: Applies to both RESET in the MAX705-MAX708 and RESET in the MAX707/MAX708/MAX813L.MAX705MAX708/MAX813LLow-Cost, P Supervisory Circuits4_Typical Operating CharacteristicsMAX707/MAX708/MAX813L?RESET OUTPUT VOLTAGE?vs. SUPPLY VOLTAGE500ms/divVCC0VRESET0V+5V1V/div+5V1V/divTA = +25CGNDRESETVCC330pF10k?MAX813L?RESET RESPONSE TIME2s/div+5VVCC0V0V+4V+4VGNDRESETVCC330pF10kMAX705/MAX707?RESET OUTPUT VOLTAGE?vs. SUPPLY VOLTAGE500ms/divVCC0VRESET0V+5V1V/div+5V1V/divVCCGNDRESETVCC2kRESET330pFTA = +25C?MAX705/MAX707?RESET RESPONSE TIME2s/divVCC+5VRESET+5V+4V1V/div0VTA = +25CVCCGNDRESETVCC10kRESET30pF?POWER-FAIL COMPARATOR?DE-ASSERTION RESPONSE TIME400ns/divPFI+1.20VPFO0V+3V+1.30VVCC = +5V?TA = +25C+5VPFO30pF1k+1.25VPFI?POWER-FAIL COMPARATOR?ASSERTION RESPONSE TIME400ns/divPFI+1.30VPFO+5V0V+1.20V1V/div50mV/div+5VPFO30pF1k+1.25VPFIVCC = +5V?TA = +25C?MAX707?RESET, RESET ASSERTION400ns/div0V+5VRESETRESET1V/divVCC = VRT?TA = +25C+5V0VVCCGNDRESET10k330pFRESET10k330pF?MAX707?RESET, RESET DE-ASSERTION400ns/div0V+5VRESETRESET2V/divVCC = VRT?TA = +25C+5V0VVCCGNDRESETRESET10k330pF10k330pFMAX705MAX708/MAX813LLow-Cost, P Supervisory Circuits_5_Pin DescriptionWatchdog Output pulls low when the internal watch-dog timer finishes its 1.6sec count and does not gohigh again until the watchdog is cleared. WDO alsogoes low during low-line conditions. Whenever VCCisbelow the reset threshold, WDO stays low; however,unlike RESET, WDO does not have a minimum pulsewidth. As soon as VCCrises above the reset thresh-old, WDO goes high with no delay.Active-High Reset Output is the inverse of RESET.Whenever RESET is high, RESET is low, and viceversa (Figure 2). The MAX813L has a RESET outputonly.Active-Low Reset Output pulses low for 200ms whentriggered, and stays low whenever VCCis below thereset threshold (4.65V in the MAX705 and 4.40V in theMAX706). It remains low for 200ms after VCCrisesabove the reset threshold or MR goes from low to high(Figure 3). A watchdog timeout will not trigger RESETunless WDO is connected to MR.Watchdog Input. If WDI remains high or low for1.6sec, the internal watchdog timer runs out andWDO goes low (Figure 1). Floating WDI or connect-ing WDI to a high-impedance three-state buffer dis-ables the watchdog feature. The internal watchdogtimer clears whenever reset is asserted, WDI is three-stated, or WDI sees a rising or falling edge.Power-Fail Output goes low and sinks current whenPFI is less than 1.25V; otherwise PFO stays high.Power-Fail Voltage Monitor Input. When PFI is lessthan 1.25V, PFO goes low. Connect PFI to GND orVCCwhen not used.FUNCTIONMAX705/MAX706RESET78-WDO8-8RESET-77No ConnectN.C.-6-WDI6-6PFO555PFI4440V Ground Reference for all signalsGND333+5V Supply InputVCC222NAMEDIP/SODIP/SODIP/SOMAX707/MAX708PIN-21-87654MAX2-1-7654MAX12-87654MAXMAX813LManual-Reset Input triggers a reset pulse whenpulled below 0.8V. This active-low input has an inter-nal 250A pull-up current. It can be driven from a TTLor CMOS logic line as well as shorted to ground witha switch.MR111333MAX705MAX708/MAX813L_Detailed DescriptionReset OutputA microprocessors (Ps) reset input starts the P in aknown state. Whenever the P is in an unknown state, itshould be held in reset. The MAX705-MAX708/MAX813Lassert reset during power-up and prevent code execu-tion errors during power-down or brownout conditions.On power-up, once VCCreaches 1V, RESET is a guaran-teed logic low of 0.4V or less. As VCCrises, RESET stayslow. When VCCrises above the reset threshold, an inter-nal timer releases RESET after about 200ms. RESET puls-es low whenever VCCdips below the reset threshold, i.e.brownout condition. If brownout occurs in the middle ofa previously initiated reset pulse, the pulse continues forat least another 140ms. On power-down, once VCCfallsbelow the reset threshold, RESET stays low and is guar-anteed to be 0.4V or less until VCCdrops below 1V.The MAX707/MAX708/MAX813L active-high RESET outputis simply the complement of the RESET output, and isguaranteed to be valid with VCCdown to 1.1V. Some Ps,such as Intels 80C51, require an active-high reset pulse.Watchdog TimerThe MAX705/MAX706/MAX813L watchdog circuit moni-tors the Ps activity. If the P does not toggle the watch-dog input (WDI) within 1.6sec and WDI is not three-stat-ed, WDO goes low. As long as RESET is asserted or theWDI input is three-stated, the watchdog timer will staycleared and will not count. As soon as reset is releasedand WDI is driven high or low, the timer will start counting.Pulses as short as 50ns can be detected.Typically, WDO will be connected to the non-maskableinterrupt input (NMI) of a P. When VCCdrops belowthe reset threshold, WDO will go low whether or not thewatchdog timer has timed out yet. Normally this wouldtrigger an NMI interrupt, but RESET goes low simultane-ously, and thus overrides the NMI interrupt.If WDI is left unconnected, WDO can be used as a low-line output. Since floating WDI disables the internaltimer, WDO goes low only when VCCfalls below thereset threshold, thus functioning as a low-line output.The MAX705/MAX706 have a watchdog timer and aRESET output. The MAX707/MAX708 have both active-high and active-low reset outputs. The MAX813L hasboth an active-high reset output and a watchdog timer.Manual ResetThe manual-reset input (MR) allows reset to be trig-gered by a pushbutton switch. The switch is effectivelydebounced by the 140ms minimum reset pulse width.MR is TTL/CMOS logic compatible, so it can be drivenby an external logic line. MR can be used to force awatchdog timeout to generate a reset pulse in theMAX705/MAX706/MAX813L. Simply connect WDO toMR.Low-Cost, P Supervisory Circuits6_WATCHDOG?TRANSITION?DETECTORWATCHDOG?TIMERTIMEBASE FOR?RESET AND?WATCHDOGRESET?GENERATORVCC250A8WDO7RESET?(RESET)5PFOGND31.25V4.65V* 4.40V FOR MAX7O6. ?( ) ARE FOR MAX813L ONLY.6WDI1MR2VCC4PFIMAX705?MAX706?MAX813LFigure 1. MAX705/MAX706/MAX813L Block DiagramRESET?GENERATORVCC250A8RESET7RESET5PFOGND31.25V4.65V* 4.40V FOR MAX7O6. 1MR2VCC4PFIMAX707?MAX708Figure 2. MAX707/MAX708 Block DiagramPower-Fail ComparatorThe power-fail comparator can be used for various pur-poses because its output and noninverting input arenot internally connected. The inverting input is internal-ly connected to a 1.25V reference.To build an early-warning circuit for power failure, con-nect the PFI pin to a voltage divider (see TypicalOperating Circuit). Choose the voltage divider ratio sothat the voltage at PFI falls below 1.25V just before the+5V regulator drops out. Use PFO to interrupt the Pso it can prepare for an orderly power-down._Applications InformationEnsuring a Valid RESETOutput Down to VCC= 0VWhen VCCfalls below 1V, the MAX705-MAX708 RESEToutput no longer sinks currentit becomes an open cir-cuit. High-impedance CMOS logic inputs can drift toundetermined voltages if left undriven. If a pull-downresistor is added to the RESET pin as shown in Figure 5,any stray charge or leakage currents will be drained toground, holding RESET low. Resistor value (R1) is notcritical. It should be about 100k, large enough not toload RESET and small enough to pull RESET to ground.Monitoring Voltages Other Than theUnregulated DC InputMonitor voltages other than the unregulated DC byconnecting a voltage divider to PFI and adjusting theratio appropriately. If required, add hysteresis by con-necting a resistor (with a value approximately 10 timesthe sum of the two resistors in the potential divider net-work) between PFI and PFO. A capacitor between PFIand GND will reduce the power-fail circuits sensitivityto high-frequency noise on the line being monitored.RESET can be asserted on other voltages in addition tothe +5V VCCline. Connect PFO to MR to initiate a RESETpulse when PFI drops below 1.25V. Figure 6 shows theMAX705-MAX708 configured to assert RESET when the+5V supply falls below the reset threshold, or when the+12V supply falls below approximately 11V.Monitoring a Negative VoltageThe power-fail comparator can also monitor a negativesupply rail (Figure 7). When the negative rail is good (anegative voltage of large magnitude), PFO is low, andwhen the negative rail is degraded (a negative voltageof lesser magnitude), PFO is high. By adding the resis-tors and transistor as shown, a high PFO triggers reset.As long as PFO remains high, the MAX705-MAX708/MAX813L will keep reset asserted (RESET =low, RESET = high). Note that this circuits accuracydepends on the PFI threshold tolerance, the VCCline,and the resistors.MAX705MAX708/MAX813LLow-Cost, P Supervisory Circuits_7tWPtWDtWDtWD+5V0VWDI+5V0VWDO+5V0VRESET+5V0V(RESET)tRS( ) ARE FOR MAX813L ONLY.RESET EXTERNALLY?TRIGGERED BY MRFigure 3. MAX705/MAX706/MAX813L Watchdog TImingFigure 4. MAX705/MAX706 RESET, MR, and WDO Timing withWDI Three-Stated. The MAX707/MAX708/MAX813L RESEToutput is the inverse of RESET shown.tRStRS+5V0VRESETWDO+5V0VMRtMRMR EXTERNALLY DRIVEN LOW+5V0VVCCVRTVRTtMDMAX705MAX708/MAX813LInterfacing to Ps withBidirectional Reset PinsPs with bidirectional reset pins, such as the Motorola68HC11 series, can contend with the MAX705-MAX708RESET output. If, for example, the RESET output is drivenhigh and the P wants to pull it low, indeterminate logiclevels may result. To correct this, connect a 4.7kresistor between the RESET output and the P reset I/O,as in Figure 8. Buffer the RESET output to other systemcomponents.Low-Cost, P Supervisory Circuits8_MAX70_RESETR2R1+5VV-VCCPFIGNDMRPFOTO P100k100k2N3904MRPFO+5V0V+5V0VVTRIP0VV-Figure 7. Monitoring a Negative VoltageMAX70_BUFFERED RESET TO OTHER SYSTEM COMPONENTS4.7kVCCGNDRESETVCCGNDRESETPFigure 8. Interfacing to Ps with Bidirectional Reset I/O51.25R11.25VTRIPR2,VTRIP0=MAX70_RESETR1Figure 5. RESET Valid to Ground CircuitMAX70_RESET130k?1%PARAMETERMINTYPMAXUNIT+12V Reset?Threshold at +25C10.67 10.87 11.50V1M?1%+5V+12VVCCPFIGNDMRPFOTO PFigure 6. Monitoring Both +5V and +12VMAX705MAX708/MAX813LLow-Cost, P Supervisory Circuits_9_Ordering Information (continued)*Dice are specified at TA= +25C.*Contact factory for availability and processing to MIL-STD-883. 8 CERDIP*-55C to +125CMAX813LMJA8 Plastic DIP0C to +70CMAX708CPA8 SO0C to +70CMAX708CSADice*0C to +70CMAX708C/D8 Plastic DIP-40C to +85CMAX708EPA8 SO-40C to +85CMAX708ESA8 CERDIP*-55C to +125CMAX708MJA8 Plastic DIP0C to +70CMAX813LCPA8 SO0C to +70CMAX813LCSADice*0C to +70CMAX813LC/D8 Plastic DIP-40C to +85CMAX813LEPA8 SO-40C to +85CMAX813LESA8 CERDIP*-55C to +125CMAX707MJA8 SO-40C to +85CMAX707ESA8 Plastic DIP-40C to +85CMAX707EPADice*0C to +70CMAX707C/D8 SO0C to +70CMAX707CSA8 Plastic DIP0C to +70CMAX707CPA8 CERDIP*-55C to +125CMAX706MJA8 SO-40C to +85CMAX706ESA8 Plastic DIP-40C to +85CMAX706EPA8 CERDIP*-55C to +125CMAX705MJA8 SO-40C to +85CMAX705ESA8 Plastic DIP-40C to +85CMAX705EPAPIN-PACKAGETEMP. RANGEPARTDice*0C to +70CMAX706C/D8 SO0C to +70CMAX706CSA8 Plastic DIP0C to +70CMAX706CPA8 MAX0C to +70CMAX706CUA8 MAX0C to +70CMAX707CUA8 MAX0C to +70CMAX708CUA8 MAX0C to +70CMAX813LCUA_Pin Configuration (continued)TOP VIEW12348765WDORESETWDIPFOPFIPFIVCCMRMAXMAX705?MAX706?MAX813L12348765N.C.GNDGNDVCCMRMAXMAX707?MAX708( ) ARE FOR MAX813L ONLY.(RESET) RESETPFORESET_Chip Topography( ) ARE FOR MAX813L ONLY.TRANSISTOR COUNT: 572SUBSTRATE MUST BE LEFT UNCONNECTED.RESET (RESET) GNDWDO/RESET PFI0.051?(1.30mm)0.074?(1.88mm)WDI/N.C.PFOVCCMRMAX705MAX708/MAX813LLow-Cost, P Supervisory Circuits10_Package InformationLCA1BDIM?A?A1?B?C?D?E?e?H?L?MIN?0.036?0.004?0.010?0.005?0.116?0.116?0.188?0.016?0MAX?0.044?0.008?0.014?0.007?0.120?0.120?0.198?0.026?6MIN?0.91?0.10?0.25?0.13?2.95?2.95?4.78?0.41?0MAX?1.11?0.20?0.36?0.18?3.05?3.05?5.03?0.66?6INCHESMILLIMETERS8-PIN MAX?MICROMAX SMALL-OUTLINE?PACKAGE0.650.0256AeEHD0.101mm?0.004 in21-0036DMAX705MAX708/MAX813LLow-Cost, P Supervisory Circuits_11MAX12324.37/4.622500.15/0.6/1.20.2(0.05)81.71MAX690A/692A4.65/4.401401.6104000.35(0.2)5(0.05)83.26MAX690R/S/T2.63/2.93/3.081401.664000.5(0.4)1(0.4)83.23MAX691A/693A4.65/4.40140/adj.1.6/adj.1.225/10ns0.1(0.035)5(0.04)163.61MAX1691The MAX1691 is a module with the MAX691A and a 125mAh lithium battery16MAX696Adj.35/adj.1.6/adj.163.55MAX697Adj.35/adj.1.6/adj.163.58MAX7004.65/adj.2000.2(0.1)82.17MAX703/7044.65/4.40140104000.35(0.2)5(0.05)81.38*MAX704R/S/T2.63/2.93/3.0814064000.5(0.4)1(0.4)82.93MAX705/7064.65/4.401401.60.35(0.2)81.02*MAX706P2.631401.60.35(0.2)81.71MAX706R/S/T2.63/2.93/3.081401.60.35(0.2)81.71MAX707/7084.65/4.401400.35(0.2)80.88*MAX708R/S/T2.63/2.93/3.081400.35(0.2)81.63MAX7914.6514011.225/10ns0.15(0.06)5(0.04)163.90MAX792L/M/R/S/T4.65