基于FPGA的FIR滤波器设计

1本报告分两部分PORK草鱼1草鱼由MATLAB计算FIR数字滤波器的滤波系数；PORK草鱼2草鱼用VHDL语言设计逻辑电路，鲤鱼再通过QUARTUS草鱼II草鱼软件，鲤鱼将各个模块的电路封装成期间，鲤鱼在顶层设计中通过连线，鲤鱼完成整个系统。草鱼草鱼所有源程序在本文档同一文件夹下的FIR文件中。草鱼草鱼草鱼FIR数字滤波器的系数计算。草鱼草鱼这里通过MATLAB的FDATOOL软件实现。草鱼草鱼输入数据SN为9位，鲤鱼输出YN为10位的低通滤波器草鱼数据PORK各个参数如下PORK草鱼LILTER草鱼TYPER草鱼草鱼LOWPASS草鱼草鱼FIR草鱼WINDOW草鱼草鱼KAISER草鱼草鱼阶数PORK15，鲤鱼BETA05,FS48KHZ,FC108KHZ草鱼草鱼滤波类型为PORK直接型FIR草鱼草鱼草鱼FIR滤波器的幅频响应草鱼草鱼草鱼草鱼相频响应草鱼2草鱼草鱼FIR滤波器的冲击响应草鱼草鱼草鱼滤波器系数草鱼草鱼草鱼对系数进行调整，鲤鱼整数化PORK草鱼NUM草鱼草鱼草鱼00742草鱼草鱼00234草鱼草鱼01133草鱼草鱼00117草鱼草鱼01758草鱼草鱼10977草鱼03594草鱼草鱼草鱼08281草鱼草鱼08281草鱼草鱼03594草鱼草鱼00977草鱼草鱼01758草鱼草鱼草鱼00117草鱼草鱼草鱼01133草鱼草鱼00234草鱼草鱼00742草鱼草鱼草鱼草鱼3NUM28草鱼草鱼ANS草鱼草鱼草鱼草鱼草鱼COLUMNS草鱼1草鱼THROUGH草鱼10草鱼草鱼草鱼草鱼189952草鱼草鱼草鱼草鱼59904草鱼草鱼草鱼290048草鱼草鱼草鱼草鱼29952草鱼草鱼450048草鱼2810112草鱼草鱼草鱼920064草鱼草鱼2119936草鱼草鱼2119936草鱼草鱼草鱼920064草鱼草鱼草鱼草鱼COLUMNS草鱼11草鱼THROUGH草鱼16草鱼草鱼草鱼草鱼草鱼250112草鱼草鱼450048草鱼草鱼草鱼草鱼29952草鱼草鱼草鱼290048草鱼草鱼草鱼草鱼59904草鱼草鱼189952草鱼草鱼草鱼FIR数字滤波器的VHDL实现草鱼根据作业要求，鲤鱼SN为9位，鲤鱼YN为10位的低通滤波器。草鱼数据PORK草鱼草鱼19,6,29,3,45,25,92,212,212,92,25,45,3,29,6,19草鱼草鱼阶数PORK15，鲤鱼BETA05,FS48KHZ,FC108KHZ草鱼草鱼草鱼草鱼草鱼滤波类型为PORK直接型FIR草鱼草鱼草鱼草鱼草鱼FIR滤波器的原理图设计如下PORK草鱼草鱼草鱼草鱼草鱼草鱼设计原理PORK草鱼草鱼一草鱼概要草鱼草鱼4我的原理说明是根据上面原理图的设计顺序逐步进行的。草鱼草鱼1草鱼寄存器（延时器）。草鱼草鱼草鱼草鱼草鱼草鱼原理图上标有DFF9的器件。草鱼输入9位数据，鲤鱼通过DFF9的D触发寄存器，鲤鱼达到延时的作用。草鱼草鱼2草鱼第一级加法器草鱼草鱼草鱼草鱼草鱼数据通过ADD9910,就是9位数字输入，鲤鱼10位数字输出加法器，鲤鱼完成第一级相加运算，鲤鱼因为本题是16阶FIR数字滤波器，鲤鱼它的滤波系数有对称的关系，鲤鱼所以采用上面的第一级加法器，鲤鱼达到简化运算的效果。草鱼草鱼3草鱼乘法器草鱼乘法器用来将数据乘以由MATLAB计算得到的滤波系数，鲤鱼本题的系数分别为PORK19,6,29,3,45,25,92,212。草鱼草鱼在乘法器设计时暂时没有考虑符号，鲤鱼符号问题由下面的减法器实现。草鱼即PORK若系数符号为负，鲤鱼那么在下一级用减法器减去乘法器所得的数据。草鱼所有的乘法器为PORKMULT19,草鱼MULT草鱼MULT草鱼6,草鱼MULT草鱼29,草鱼MULT草鱼3,草鱼MULT草鱼45,草鱼MULT草鱼25,草鱼MULT草鱼92,草鱼MULT草鱼212。草鱼草鱼4草鱼第二级加，鲤鱼减法器草鱼第二级加法器主要有ADD111414,ADD151415,ADD161717。草鱼ADD111414就是说11位数据加14位数据输出14位数据，鲤鱼说有的都是相同的命名规则。草鱼减法器的作用是反映乘法器的负号的，鲤鱼对于负的滤波系数，鲤鱼在此相当于经过减法器相减。草鱼草鱼5草鱼第三级加，鲤鱼减法器草鱼与上一级大体相同的原理。草鱼草鱼6草鱼输出草鱼输出通过ADD141710，鲤鱼将上一级得到的14位和17位数据相加，鲤鱼再拿出相加结果的高十位作为输出。草鱼草鱼到此，鲤鱼整个FIR数字滤波器设计完毕，鲤鱼下面详细说明各个部分的具体实现。草鱼草鱼草鱼二草鱼详细说明草鱼草鱼草鱼我的说明是根据上面的概要逐一展开的。草鱼草鱼我的设计是先编写各个功能的VHDL源文件，鲤鱼再生成功能模块，鲤鱼最后在顶层用原理图的设计方法连线，鲤鱼组成整个系统。草鱼草鱼草鱼1草鱼寄存器（延时器）草鱼草鱼草鱼草鱼草鱼草鱼草鱼设计中用D触发器组成寄存器，鲤鱼实现寄存功能。草鱼这里用来寄存一组9位的二进制数据。草鱼草鱼实现功能PORK草鱼在CP正跳沿前接受输入信号，鲤鱼正跳沿时触发翻转，鲤鱼正跳沿后输入即被封锁。草鱼草鱼源文件PORK草鱼5ENTITY草鱼DFF9草鱼IS草鱼草鱼PORT草鱼CLK草鱼草鱼草鱼草鱼IN草鱼草鱼STD_LOGICPORK草鱼草鱼草鱼草鱼CLEAR草鱼草鱼IN草鱼草鱼STD_LOGICPORK草鱼草鱼草鱼DIN草鱼草鱼草鱼草鱼草鱼草鱼IN草鱼草鱼STD_LOGIC_VECTOR8草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼DOUT草鱼草鱼草鱼草鱼草鱼草鱼OUT草鱼STD_LOGIC_VECTOR8草鱼DOWNTO草鱼0草鱼PORK草鱼草鱼END草鱼DFF9PORK草鱼草鱼草鱼ARCHITECTURE草鱼A草鱼OF草鱼DFF9草鱼IS草鱼草鱼BEGIN草鱼草鱼草鱼草鱼PROCESSCLK,CLEAR草鱼草鱼草鱼草鱼草鱼草鱼BEGIN草鱼草鱼草鱼草鱼IF草鱼CLEAR1草鱼THEN草鱼草鱼DOUT“000000000“PORK草鱼草鱼草鱼ELSIF草鱼CLEAR0草鱼THEN草鱼草鱼草鱼草鱼草鱼IFCLKEVENT草鱼AND草鱼CLK1草鱼THEN草鱼草鱼DOUT草鱼草鱼DINPORK草鱼草鱼草鱼草鱼草鱼END草鱼IFPORK草鱼草鱼草鱼草鱼END草鱼IFPORK草鱼草鱼草鱼草鱼END草鱼PROCESSPORK草鱼草鱼END草鱼APORK草鱼草鱼2草鱼第一级加法器草鱼草鱼草鱼草鱼草鱼草鱼实现两个二进制数字的相加运算。草鱼当到达时钟上升沿时，鲤鱼将两数输入，鲤鱼运算，鲤鱼输出结果。草鱼草鱼源文件PORK草鱼LIBRARY草鱼IEEEPORK草鱼USE草鱼IEEESTD_LOGIC_1164ALLPORK草鱼USE草鱼IEEESTD_LOGIC_ARITHALLPORK草鱼ENTITY草鱼ADD9910草鱼IS草鱼PORTCLK草鱼草鱼IN草鱼STD_LOGICPORK草鱼草鱼草鱼草鱼草鱼草鱼DIN1,DIN2草鱼IN草鱼SIGNED草鱼8草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼草鱼草鱼DOUTOUT草鱼SIGNED9草鱼DOWNTO草鱼0PORK草鱼END草鱼ADD9910PORK草鱼ARCHITECTURE草鱼A草鱼OF草鱼ADD9910草鱼IS草鱼SIGNAL草鱼S1草鱼SIGNED9草鱼DOWNTO草鱼0PORK草鱼SIGNAL草鱼S2草鱼SIGNED9草鱼DOWNTO草鱼0PORK草鱼BEGIN草鱼草鱼草鱼草鱼草鱼S1DIN18PORK草鱼6草鱼草鱼草鱼草鱼S2DIN28PORK草鱼PROCESSDIN1,DIN2,CLK草鱼BEGIN草鱼IF草鱼CLKEVENT草鱼AND草鱼CLK1草鱼THEN草鱼DOUTS1S2PORK草鱼END草鱼IFPORK草鱼END草鱼PROCESSPORK草鱼END草鱼APORK草鱼草鱼3草鱼乘法器草鱼草鱼草鱼功能PORK草鱼将数据乘以由MATLAB计算得到的滤波系数。草鱼总共有8个乘法器。草鱼草鱼源文件（以MULT19为例）PORK草鱼LIBRARY草鱼IEEEPORK草鱼USE草鱼IEEESTD_LOGIC_1164ALLPORK草鱼USE草鱼IEEESTD_LOGIC_ARITHALLPORK草鱼ENTITY草鱼MULT19草鱼IS草鱼PORT草鱼草鱼CLK草鱼草鱼草鱼IN草鱼STD_LOGICPORK草鱼草鱼草鱼DIN草鱼草鱼草鱼IN草鱼SIGNED草鱼9草鱼DOWNTO草鱼0PORK草鱼草鱼DOUT草鱼草鱼草鱼OUT草鱼SIGNED草鱼13草鱼DOWNTO草鱼0PORK草鱼END草鱼MULT19PORK草鱼ARCHITECTURE草鱼A草鱼OF草鱼MULT19草鱼IS草鱼SIGNAL草鱼S1草鱼草鱼SIGNED草鱼13草鱼DOWNTO草鱼0PORK草鱼SIGNAL草鱼S2草鱼草鱼SIGNED草鱼10草鱼DOWNTO草鱼0PORK草鱼SIGNAL草鱼S3草鱼草鱼SIGNED草鱼13草鱼DOWNTO草鱼0PORK草鱼草鱼BEGIN草鱼P1PROCESSDIN草鱼BEGIN草鱼S113草鱼DOWNTO草鱼4DINPORK草鱼S1草鱼3草鱼DOWNTO草鱼0“0000“PORK草鱼S210草鱼DOWNTO草鱼1DINPORK草鱼S200PORK草鱼IF草鱼DIN90草鱼THEN草鱼草鱼7S30PORK草鱼草鱼ELSE草鱼草鱼S31PORK草鱼草鱼END草鱼IFPORK草鱼END草鱼PROCESSPORK草鱼P2草鱼PROCESSCLK草鱼BEGIN草鱼IF草鱼CLKEVENT草鱼AND草鱼CLK1草鱼THEN草鱼DOUTS3PORK草鱼END草鱼IFPORK草鱼END草鱼PROCESSPORK草鱼END草鱼APORK草鱼草鱼4草鱼第二级加，鲤鱼减法器草鱼草鱼草鱼草鱼草鱼对于乘了滤波系数的数据，鲤鱼进行第二次的加和，鲤鱼由于上面有的滤波系数是负的，鲤鱼所以这里用减法器对上一面的负系数做减法运算。草鱼草鱼源程序PORK草鱼减法器SUB121414草鱼草鱼LIBRARY草鱼IEEEPORK草鱼USE草鱼IEEESTD_LOGIC_1164ALLPORK草鱼USE草鱼IEEESTD_LOGIC_ARITHALLPORK草鱼ENTITY草鱼SUB121414草鱼IS草鱼PORTCLK草鱼草鱼IN草鱼STD_LOGICPORK草鱼草鱼草鱼草鱼草鱼草鱼DIN1草鱼IN草鱼SIGNED草鱼13草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼草鱼草鱼DIN2草鱼IN草鱼SIGNED草鱼11草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼草鱼草鱼DOUTOUT草鱼SIGNED13草鱼DOWNTO草鱼0PORK草鱼END草鱼SUB121414PORK草鱼ARCHITECTURE草鱼A草鱼OF草鱼SUB121414草鱼IS草鱼SIGNAL草鱼S1草鱼SIGNED13草鱼DOWNTO草鱼0PORK草鱼BEGIN草鱼草鱼草鱼草鱼草鱼S1DIN211PORK草鱼PROCESSDIN1,DIN2,CLK草鱼BEGIN草鱼IF草鱼CLKEVENT草鱼AND草鱼CLK1草鱼THEN草鱼DOUTS1DIN1PORK草鱼END草鱼IFPORK草鱼8END草鱼PROCESSPORK草鱼END草鱼APORK草鱼草鱼加法器草鱼ADD111414草鱼草鱼LIBRARY草鱼IEEEPORK草鱼USE草鱼IEEESTD_LOGIC_1164ALLPORK草鱼USE草鱼IEEESTD_LOGIC_ARITHALLPORK草鱼ENTITY草鱼ADD111414草鱼IS草鱼PORTCLK草鱼草鱼IN草鱼STD_LOGICPORK草鱼草鱼草鱼草鱼草鱼草鱼DIN1草鱼IN草鱼SIGNED草鱼10草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼草鱼草鱼DIN2草鱼IN草鱼SIGNED草鱼13草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼草鱼草鱼DOUTOUT草鱼SIGNED13草鱼DOWNTO草鱼0PORK草鱼END草鱼ADD111414PORK草鱼ARCHITECTURE草鱼A草鱼OF草鱼ADD111414草鱼IS草鱼SIGNAL草鱼S1草鱼SIGNED13草鱼DOWNTO草鱼0PORK草鱼BEGIN草鱼草鱼草鱼草鱼草鱼S1DIN111PORK草鱼PROCESSDIN1,DIN2,CLK草鱼BEGIN草鱼IF草鱼CLKEVENT草鱼AND草鱼CLK1草鱼THEN草鱼DOUTS1DIN2PORK草鱼END草鱼IFPORK草鱼END草鱼PROCESSPORK草鱼END草鱼APORK草鱼还有ADD151415,ADD161717（略）草鱼草鱼5草鱼第三级加，鲤鱼减法器草鱼草鱼功能同上PORK草鱼草鱼加法器ADD141415草鱼草鱼9源代码PORK草鱼LIBRARY草鱼IEEEPORK草鱼USE草鱼IEEESTD_LOGIC_1164ALLPORK草鱼USE草鱼IEEESTD_LOGIC_ARITHALLPORK草鱼ENTITY草鱼ADD141415草鱼IS草鱼PORTCLK草鱼草鱼IN草鱼STD_LOGICPORK草鱼草鱼草鱼草鱼草鱼草鱼DIN1草鱼IN草鱼SIGNED草鱼13草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼草鱼草鱼DIN2草鱼IN草鱼SIGNED草鱼13草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼草鱼草鱼DOUTOUT草鱼SIGNED14草鱼DOWNTO草鱼0PORK草鱼END草鱼ADD141415PORK草鱼ARCHITECTURE草鱼A草鱼OF草鱼ADD141415草鱼IS草鱼SIGNAL草鱼S1草鱼SIGNED14草鱼DOWNTO草鱼0PORK草鱼SIGNAL草鱼S2草鱼SIGNED14草鱼DOWNTO草鱼0PORK草鱼BEGIN草鱼草鱼草鱼草鱼草鱼S1DIN113PORK草鱼草鱼草鱼草鱼草鱼S2DIN113PORK草鱼PROCESSDIN1,DIN2,CLK草鱼BEGIN草鱼IF草鱼CLKEVENT草鱼AND草鱼CLK1草鱼THEN草鱼DOUTS1S2PORK草鱼END草鱼IFPORK草鱼END草鱼PROCESSPORK草鱼END草鱼APORK草鱼草鱼减法器SUB171517草鱼草鱼源代码PORK草鱼LIBRARY草鱼IEEEPORK草鱼USE草鱼IEEESTD_LOGIC_1164ALLPORK草鱼USE草鱼IEEESTD_LOGIC_ARITHALLPORK草鱼ENTITY草鱼SUB171517草鱼IS草鱼PORTCLK草鱼草鱼IN草鱼STD_LOGICPORK草鱼草鱼草鱼草鱼草鱼草鱼DIN1草鱼IN草鱼SIGNED草鱼14草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼草鱼草鱼DIN2草鱼IN草鱼SIGNED草鱼16草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼草鱼草鱼DOUTOUT草鱼SIGNED16草鱼DOWNTO草鱼0PORK草鱼END草鱼SUB171517PORK草鱼ARCHITECTURE草鱼A草鱼OF草鱼SUB171517草鱼IS草鱼SIGNAL草鱼S1草鱼SIGNED16草鱼DOWNTO草鱼0PORK草鱼BEGIN草鱼10草鱼草鱼草鱼草鱼S1DIN114PORK草鱼PROCESSDIN1,DIN2,CLK草鱼BEGIN草鱼IF草鱼CLKEVENT草鱼AND草鱼CLK1草鱼THEN草鱼DOUTDIN2S1PORK草鱼END草鱼IFPORK草鱼END草鱼PROCESSPORK草鱼END草鱼APORK草鱼草鱼草鱼6草鱼输出级草鱼输出通过一个加法器ADD151710完成10位数据的输出，鲤鱼通过一个15位与一个17位数据相加得到的数据取高10为作为最终结果。草鱼草鱼草鱼草鱼源程序PORK草鱼LIBRARY草鱼IEEEPORK草鱼USE草鱼IEEESTD_LOGIC_1164ALLPORK草鱼USE草鱼IEEESTD_LOGIC_ARITHALLPORK草鱼ENTITY草鱼ADD151710草鱼IS草鱼PORTCLK草鱼草鱼IN草鱼STD_LOGICPORK草鱼草鱼草鱼草鱼草鱼草鱼DIN1IN草鱼SIGNED草鱼14草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼草鱼草鱼DIN2IN草鱼SIGNED草鱼16草鱼DOWNTO草鱼0PORK草鱼草鱼草鱼草鱼草鱼草鱼草鱼DOUTOUT草鱼SIGNED9草鱼DOWNTO草鱼0PORK草鱼END草鱼ADD151710PORK草鱼ARCHITECTURE草鱼A草鱼OF草鱼ADD151710草鱼IS草鱼SIGNAL草鱼S1草鱼SIGNED9草鱼DOWNTO草鱼0PORK草鱼SIGNAL草鱼S2草鱼SIGNED9草鱼DOWNTO草鱼0PORK草鱼BEGIN草鱼草鱼草鱼草鱼草鱼S1DIN113PORK草鱼草鱼草鱼草鱼草鱼S2DIN216草鱼DOWNTO草鱼7PORK草鱼PROCESSDIN1,DIN2,CLK草鱼BEGIN草鱼11IF草鱼CLKEVENT草鱼AND草鱼CLK1草鱼THEN草鱼DOUTS1S2PORK草鱼END草鱼IFPORK草鱼END草鱼PROCESSPORK草鱼END草鱼APORK草鱼草鱼草鱼三草鱼输出数据分析草鱼草鱼任意输入一组信号PORK草鱼DIN96，鲤鱼0，鲤鱼0，鲤鱼0，鲤鱼48，鲤鱼0，鲤鱼0，鲤鱼0，鲤鱼96，鲤鱼0，鲤鱼0，鲤鱼0，鲤鱼48，鲤鱼0，鲤鱼0，鲤鱼0，鲤鱼96，鲤鱼0，鲤鱼0，鲤鱼0，鲤鱼48，鲤鱼0，鲤鱼0，鲤鱼0，鲤鱼96，鲤鱼0，鲤鱼0，鲤鱼0，鲤鱼48，鲤鱼0，鲤鱼0，鲤鱼0草鱼草鱼由QUARTUS草鱼II仿真结果如下PORK草鱼草鱼草鱼草鱼草鱼整理数据如下PORK草鱼输出草鱼DOUT21草鱼2草鱼17草鱼10草鱼44草鱼80草鱼71草鱼29草鱼28草鱼24草鱼24草鱼28草鱼39草鱼72草鱼72草鱼39草鱼28草鱼24草鱼24草鱼28草鱼39草鱼72草鱼72草鱼39草鱼28草鱼24草鱼24草鱼28草鱼39草鱼72草鱼72草鱼39草鱼28草鱼草鱼卷积结果PORK草鱼H19,6,29,3,45,25,92,212,212,