SMT高级工程师教案(DOC 43页)

SMT高级工程师教案(DOC 43页) SMT高級工程師教案6SMT測試ATE工程師應注意及準備事項1.當拿到R/D CADFILES時，請在A-TEST導入時分析該被測試之TEST ABILITY2.在B-TEST導入ATE測試時，應注意版本變更之零件，規格；並分析下列資料名稱數量A.PCB CADFILES(NEW VER)1B.BOM1C.ARTWORK1D.CIRCUIT1E.BEAR BOARD1-2F.FUNCTION M/B2-33.B-TEST後提出TEST ABILITY報告.A.列出A-TEST&B-TEST之異差B.列出那些零件須加測試點及注意事項C.列出治具要求之注意事項D.列出LAYOUT TEST PAD及測試針之規格及注意事項E.其它R/D設計須附合治具程式控制之要求ATE工程師應注意及準備事項1.R/D在LAYOUT時之節點至少要有一測試點(TEST PAD)2.線路途的每一測試點(TEST PAD)，間距至少75MIL以上3.手插零件不需加測試點，但如果是CONNECTOR很密之零件視需要加測試點.4.CHIP除了空腳外，其餘各腳均需加測試點.5.如果是單面之被測試時，測試點要均勻分佈於測試板.6.如果是雙面之被測試時，測試點儘量LAYOUT在焊錫面.7.測試點附近之零件高度應小於0.255IN(視產品而定)8.測試點周圍0.018IN內不可有測試或零件9.PCB邊緣0.125IN內不可有測試點10.測試點到另一測試點不可小於0.083IN11.所有導通孔及氣孔必須請PCB廠做MASK以防測試時漏氣12.定位孔之定位針之尺寸誤差在+-.002IN13.定位孔直徑大於0.012IN14.定位孔之內壁不可吃錫15.治具之定位孔要用C鑽孔.125.125.125.125PCB DEIGESMIN IMUNDESIRABLE TESTPAD POSITIONONG0.08272.1mm(82.7mil).035”(0.83MM)16.測試點不可被被綠漆蓋住(測試前用放大鏡檢查)17.板邊至測試點約0.125IN不可有測試點.18.測試點直徑不小於0.35/0.50in(35mil)，(目前約30mil)*測試零件CHIP,CONNECTOR為設計重點*PC BOARDDATUM POINTTOL.002(.5mm)TESTPADTOL.002(.5mm)(.5mm)TOL.002TOOL INFHOLE PROBETIP SOLDERRESIST.035(.09mm)Solder pad19.導通孔之中心間距要150mil以上20.各測試點必須吃錫，但邊緣不可被綠漆MASK21.如考量功能測試時，要在CONNECTOR最進處加測試點22.VCC點至少5點，GND點至少10點以上為治具部份23.對IC或CHIP之控制位址線(如RESET，ENABLE)不可直接接到VCC或GROUND上24.測試盪器須先除頻或加JUMPER控制NE ORCL10pf4.7K25.對POWER-ON RESET在設計，要有隔離之設計26.對振盪器如有控制ENABLE.DISABLE之產品測試會更穩，否則須加除頻電路或善用JUMP亦是一個好方法27.對IC或CHIP之OPTION空腳要LAYOUT測試點28.BGA零件背面之PCB不可LAYOUT零件RESET0.1UF4.7K VCCRESE4.7K VCCOUT VCCOSC1243測試設備的功能及區隔ATE組裝板功能測試自動調整ICTIC元件功能-IC Pattern-IC BoundarySocan ICT短路開路元件值IC保護二極體動態測試靜態測試-ATEAutomatic TestEquipment-ICTIn-Circuit Tester-MDAManufactureing DefectAnalyzer測試步驟產品靜態動態完成?短路開路?元件值?IC保護二極體?IC元件功能-IC Pattern-IC BoundaryScan?組裝板功能測試?自動調整製造不良分佈短路/開路漏件/錯件功能不良元件不良元件反插空板不良低中高製造不良分佈及測試成本短路/開路漏件/錯件功能不良元件不良元件反插空板不良低中高不良百分比測試成本測試設備的市場測試功能產品價格?組裝板功能?自動調整?短路開路?元件?IC保護二極體?IC元件能?GenRad100K美金以上-Pattern-Boundart Scan?TERADYNE?HP?TR-518F50K美金以上50K美金以上?TESCO?OKANON?TR-51測試治具?單面測試治具?雙面測試治具?真空測試治具?In-Line測試治具?壓合式測試治具治具製作的考慮因素?高品質的測試針?正確選擇測試針頭?正確選擇測試點?加裝”導板”(Guiding Plate)SMT製造不良問題未來趨勢開路短路漏件/錯件功能不良元件不良元件反插低中高SMT產品測試未來趨勢開路組裝板功能短路元件值IC保護二極體IC Pattern低中高AOI EQUIPMENT(AUTO OPTICALINSPECTION)Performance standardsin SMManufacturing keeprisi Screenprinting Pickand placeReflow Electricaltest Single-side SMTassembly processSystem assemblyor shipmentProcess Electricalin inspectionLncreased cost,Quality andSchedule demandsFocus onprocess monitoringand controlDrive toreduce inspectionmanpowerLncreasing boarddens andfiner pitchpackag makein-circuit fixtureaess harderto attailRequirement toinspec defectclasses nottestable electricallyRequirement forFast，high-defect-coverage inspection5500-Series AOIsystems fromTeradyne provideprocess monitoringat anyprocess stepSingle-side SMTScreen PrintPick/Place ReflowThru-hole loadWave ElectricalProcess TestBoard FunctionalTest Lntegration/Packaging SMTboard assemblyPre-wave inspection5515B systemComponent insertionBottm-side solder joint qualityPost-reflow inspection5529,5539systemsComponent placementSolder jointquality,including J-leads andlifted leadsPost placementinspection5529systemComponent presenceand alignmentComponent orientationThe typicalpost-reflow SMTprocess Defectspectrum AOI and ICT are oftenemployed together as Complementary tools AOIICT Lowsolder Unwettedpins Missingbypass capsSkewed/misplaced Devices(still connected)Billboarded devicesOpen poweror parallelpins Lifteleads Tombstoneddevices Missingdevices MisorientedICs Connectorpins ShortsWrong devicesMisoriented device(cap,diode)Device progranmming(flash ROM)Device defects(e.g.cracked,IC BGAand otherhidden pinsBasic devicefunction+Dose notrequire afixture+Easily usedon partiallyBuilt boards+Direct soldering-process feedback+Applies boardpower+Tests ponentfunction,and Possiblyboard function+Can testhidden featuresAOIandICTareoften emplpyedtogetherasComplementarytoolsAOI AOI測試之問題*錫少&錫多*零件外觀異常*bypass電容*零件偏移*靜態各種外觀材料*不須上電及測試針*零件翹腳*墓碑效應*缺件*LAYOUT設計不良*短路ICT*錯件*製程不良之問題*電氣功能測試(有LIBRARY)*BGA零件及其它穩藏腳位之零件*基本零件之功能裝置*不須測試治具*試產機種或機種少量變更時容易修改*迅速且即時的反應製程問題*須製作治具及加電源*能測試零件之功能特性*能夠測試基板內部及穩藏之問題The5539-Series fivecamera headdesugn*Structured lightreveals thecontours ofthe objectunder inspectionComponent bodyGood Solder joint lnspectionMeasuring averageLight intensityComera readslow lightIn the window areaif theSolder jointis goodLn thesystemVertical cameraTop lighting5500-Series systemarchitecture2-4pipelined framegrabbers*Dual68040CPUs,serialllel I/O EtherVGA Highauracy X-Y table(0.001”auracy over18”x20”board area)3/4HP DCmotors(29in./s max.table speed)1or5high-speed cameras(0.6”,0.7”or1.0”FOV)LED structured lighting dome*Board underinspection Boardstops Conveyors(SMEMA interface)Warp StrobeLaser*Patented technologyWindow typesSearch Locatesthe brightspot within thewindow(peak detectionwith subpizellizationPresence/Absence AverageMeasures theaverage intensityacross thewindow Presence/Absence VarianceMeasures theaverage intensityacross thewindow100%Variance0%Variance BridgeLooks for a continuousbrigh stripacross theWindow,either verticallyor horizontallyThe defectdetection capabilityrequired Dependson thedevice packagingemployed BoardQuad flatpack(QFP)or smallOutline ICSOIC BoardJ-lead devicePassives(0603,0402)Comprehensive visualor AOIsolderjointInspection requiresviewing froman angle1.J-lead devicePartial defect coverage FulldefectcoverageThe5539D+AOI(automated opticalinspection)Systems fromTeradyne2.Lifted leadon aQFP5539D+theory ofoperation Lmageof acircuit boardComplex image to processHard toextract thekey dataWindow approachApply simplecriteria atcritical pointsStructured lightinghighlights defectsAutomatically simplifiesthr analysisrequiredFast reliableInspection expamplesusing differentbinations ofwindow typesand lightingComponent presenceinspection Presencewindow Lightingbehind the camera(圖一)Solder jointinspection Presencewindows measuringvariance Side lighting.(“Snake eyes”)(圖二)Solder shortinspection Bridgewindows Lightingbehind thecamera Componentlocation Searchwindow Lightingfrom aboveAn exampleof usingstructuredlightto inspectfor defectson fine-pitch QFPSide lightingGood jointsHigh variancein thewindow(圖一)SidelightingBad jointsLow varianceinthewindow(圖二)Top lightingUsed fordefecting solderbridgesDifficult tomake ajudgement(圖三)Solderjointdefects defectedabout thesolder jointsWarp pensationBoard warpagecauses theimagetomove inthe fieldof viewof anangled camersThe built-in warpmeasurement systemmeasures thewarp andautomatically pensatesfor itduring inspectionWarpage measurementtechnigue*1.angled strobedlaser shinesa brightline acrossthe board surface2.the camerasmeasure theBoard warpageby lookingat theposition ofthe line3.the XYtable movesthecamera/lighting headover the boardsurfacewith theline strobedon asrequired tofreeze the measurement oftheboardwarpage Programmingan AOIsystem1.CAD outputfor pickand placesystems(X,Y,designator,package style,orientation)2.Creat programusing CDES(PC windows3.1)4.Performance Curvesverify defectcoverage andprogram stabilityUnpopulated,printed,reflowed board(i.e.100%missing Components)Performance Curvesare akey toolfor guaranteeingprogram