WAT-Training

1、TMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Introduction of WAT Test SystemTMThis document is strictly confidential and proprietary of SMIC.

2、It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.OutlineWhat is WATTest PatternHardware SystemSoftware SystemTest ParameterTMThis document is strictly confidential and proprietary of SMIC. It must not be copied o

3、r used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance. WAT standard forWafer Acceptance TestWhat is WAT?TMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference

4、only, and SMIC shall not be liable or responsible for any reliance.What kind of work?An electrical test system, non-productivity activity WAT is an electrical test system for process goodness monitor. Device characteristics:resistor, capacitor, interconnection, continuity, spacing, insulation, leaka

5、geWAT is the primary quality element for a foundry FAB ( the quality assurance for wafer output) WAT characteristics: DC force and measurement, Automation, high throughput, precision, samplingWhat is WAT?TMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used

6、for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Why WAT Monitor Process Window. Check Design Rule. Control the Process Parameters(SPC). Debug the Process Error. Reliability Characterization. Device Modeling for Circuit Design. Develop next G

7、eneration.What is WAT?TMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Test Pattern Test key: WAT just tests the Test Key some was put inside chip

8、, for design rule check, yield monitor and process qualification and development. some was put on scribe line. These test key will be destroyed after die saw.12322TMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference o

9、nly, and SMIC shall not be liable or responsible for any reliance.Test Key ATest Key BTest Key DTest Key CTest Key ETest Key FSite & Test KeyTest PatternTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and S

10、MIC shall not be liable or responsible for any reliance.TESTER 1Test HeadProberWaferProbe cardChuckController1System sketch map Hardware SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall

11、not be liable or responsible for any reliance.WAT (Wafer Acceptance Test): electrical parameter test on specially designed test structure on scrub lanes, such as all kinds of transistors, resist test patterns, leakage/breakdown test patterns, to decide whether the wafer go through an normal process,

12、 and shippable to customer.Test Tools: TEL P8XLProber stationKeithley S630Auto-tester (all SMU: Current accuracy: 0.1fA)Signatone S1170Manual ProberKeithley S4200Manual tester (One SMU: Current accuracy: 0.1fA)Agilent 4284C-V tester (Manual)Agilent 4156Manual tester (all SMU: Current accuracy: 10fA)

13、 Hardware SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Agilent Testing system Automatic Tester 4072A (Agilent) Automatic Prober P8-XL (T

14、EL) Server (workstation) HP Prober Card Hardware SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Agilent 4072 + TEL P8-XLTester Head4072ACo

15、ntrollerScreenWaferLoaderTouchPannelAuto WaferChanger Hardware SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance. Auto Tester Function Force

16、voltage, current. Measure voltage, current. Capacitance measure. Control prober moving A switch matrix to provide more than 48 pin output. Hardware SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and

17、SMIC shall not be liable or responsible for any reliance. Agilent Tester 4072AWorkstation8114A4284Power Supply81110Cooling FanSystem CabinetTest headDiag BoardCPUInputSelector8 AUXPorts8 SMUGNDUPulse Switch6 HF PortMatrixOptical Interface Hardware SystemTMThis document is strictly confidential and p

18、roprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Test Head of 4072A48 Pin48 inputExtended PathAUX PortHF PortPulseSwitch Port Hardware SystemTMThis document is strictly confidential and propri

19、etary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Auto Prober Function Wafer load, unload & transfer to chuck. Prober Card Wafer pre-alignment, precise alignment. Test Line locate. Chuck up(probed)

20、Chuck down(un-probed) Hardware SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.TEL Prober P8-XL Hardware SystemTMThis document is strictly

21、confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Prober & Prober Card Hardware SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied o

22、r used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Prober Card Bird CageStructureDirect Dockingstructure Direct Docking+4062UX4071/72A Hardware SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied

23、 or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Prober Card made in SMIC Hardware SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, an

24、d SMIC shall not be liable or responsible for any reliance.SACC: Setup Probe Card & Change Probe Card Hardware SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsib

25、le for any reliance.SACC Hardware SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Main programTPL filePut Cassette on P8Use controller toAc

26、cess Main programWAT serverSelect Test PlanWAT serverInitializationController: store raw dataProber: ProbingTester: Force and measureTest Finish load data to serverWAT Operating Flow Software SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for an

27、ypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Software of Auto Tester Agilent SPECS SPECS is a software to develop and execute a wafer measurement program Semiconductor Process Evaluation Core Software Software SystemTMThis document is strictly

28、confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.SPECS WorkCIMOperator ModeEngineering ModeRemote ExecutionAlgorithm LibraryRun Time AnalysisDatabaseSPECS FrameworkTest PlanN

29、avigatorWaferSpecificationDieSpecificationProbeSpecificationTestSpecification Software SystemTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Test

30、 parameters category:1.MOS Transistor: N-MOS, P-MOS, 3.3V N-MOS , 3.3V PMOS2.Gate Oxide (GOI)3.Fiels oxide transistor4.Junction Test 5.Rs (Sheet resistance)6.Rc (Contact resistance)7.Continuity & Bridging Test8.Capacitor TestTest ParameterTMThis document is strictly confidential and proprietary of S

31、MIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.MOS transistor (N type as example):Transistor Type:Typical NMOS (10/0.18, 10/0.2, 10/0.16), Long channel NMOS (10/10), Narrow width NMOS (0.22/10), Small NMOS

32、 (0.22/0.18)3.3V NMOS Transistor: Typical NMOS (10/0.35), Long channel NMOS (10/10), Narrow width NMOS (0.22/10)3.3V NMOS Transistor without Dummy AA (0.22/10)Primary Parameters: Vt (VTLIN, VTGm, VTSAT), IDSAT, IOFF, BVDSecondary Parameters: ISUB, DIBL, GAMMA, SWING,Gleak, Gm, Isubmax, Isubvg, Gleak

33、2, SUBVTSLP, Vt1, Vt2, MFAC1, MFAC2, BETATest ParameterTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance. Typical NMOSa)Purpose: To monitor the ele

34、ctrical property of typical sub rule transistorb)Design: L= 0.20,0.18,0.16 for 0.18 technologyAAL100.37520poly85dummy AA 5um0.160.16603080N+PWS/L0.22Test ParameterTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference o

35、nly, and SMIC shall not be liable or responsible for any reliance.Long channel NMOSa)Purpose: To monitor the electrical property of long channel transistor b)Design: L= 10 for 0.18 technology AA10L2060N+2PWS/L80300.16Test ParameterTMThis document is strictly confidential and proprietary of SMIC. It

36、must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Narrow width NMOS a) Purpose: To monitor the electrical property of narrow width transistor b) Design: W= 0.22 for 0.18 technology W2030101088060PWS/LN+0.22Test Param

37、eterTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Small NMOS a) Purpose: To monitor the electrical property of small dimension transistorb) Des

38、ign: L= 0.18 W= 0.22 for 0.18 technology 60LW10200.160.5PWS/L10530180Test ParameterTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Narrow width N

39、MOS without dummy AAa) Purpose: To monitor the electrical property impacted caused by dishing effect of STI CMPb) Design: W= 0.22 for 0.18 technology 60LW10200.220.5PWS/L10530180AAAATest ParameterTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anyp

40、urpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.Transistor WAT parameters and test condition:1. VTGm_N:VD=0.05V, VS=VB=0V,VG=0 to 0.8*1.8V, whereas 1.8V is VDDNextrapolate to VG at max slope, measure VTGm_N = VG(INTERCEPT) - 0.5*VDId/Gm vs VgId/Gm v

41、s Vg00.0010.0020.0030.0040.00500.511.522.533.54Vg(V)Vt=X-intercept - 0.5*0.05V (for NMOS)Vt=X-intercept - 0.5*0.05V (for NMOS)Id(A)Gm(mho)X-intercept (L1X)Max GmIn linear region:In Saturation region:When Id =Idsat, Vd=VG-Vth, and So, ddthgoxndVVVVCLWI212)(21thGoxndsatVVCLWIdoxnGdmVCLWVIg5 . 0)(21)(d

42、thgmdthGGdVVVgVVVVIIdd0.5VgIVVmdgthTest ParameterTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.2. VTLIN_N:VD=0.05V, VS=VB=0V,VG=0 to 0.8*1.8V,

43、whereas 1.8V is VDDNMeasure VTLIN_N=VG ID=0.1uA*(W/L)To simplify the calculation, the transistor was considered turned on when ID=0.1uA*(W/L)Typical Value:VTLIN_N_10/10 = 0.37VVTLIN_P_10/10= -0.44VVTLIN_N_10/0.18= 0.44VVTLIN_P_10/0.18 = -0.5VVTLIN_N_0.22/10 = 0.31VVTLIN_P_0.22/10 = -0.41VVTLIN_N_0.2

44、2/0.18 = 0.36VVTLIN_P_0.22/0.18 = -0.5VVTLIN_N3.3_10/10 = 0.68VVTLIN_P3.3_10/10 = -0.73VVTLIN_N3.3_10/0.35 = 0.72VVTLIN_P3.3_10/0.35 = -0.68VVTLIN_N3.3_0.22/10 = 0.56VVTLIN_P3.3_0.22/10 = -0.68V3. VTSAT_N:VD=1.8V, VS=VB=0V,VG=0 to 0.8*1.8V, whereas 1.8V is VDDNMeasure VTSAT_N = VG ID=0.1uA*(W/L)VD=V

45、DDN, to make sure that the transistor is working at the saturation statusTest ParameterTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.4. IDSAT_N

46、: VD=VG=VDDN=1.8V, VS=VB=0, Measure IDSAT_N=ID (then divide by W in some calculation)Typical Value:IDSAT_N_10/0.18 = 6mAIDSAT_P_10/0.18 = -2.59mA(600 uA/um)(-259 uA/um)IDSAT_N_0.22/10 = 4uAIDSAT_P_0.22/10 = -1.1uAIDSAT_N_0.22/0.18 = 180uAIDSAT_P_0.22/0.18 = -60AIDSAT_N3.3_10/0.35 = 6mAIDSAT_P3.3_10/

47、0.35 = -3mAIDSAT_N3.3_0.22/10 = 7.58uAIDSAT_P3.3_0.22/10 = -1.61uA2)(21thGoxndsatVVCLWITest ParameterTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any relia

48、nce.5. IOFF_NVD=1.1*1.8V, VG=VS=VB=0, Measure IOFF_N = ID (then divide by W in some calculation)Typical Value:IOFF_N_10/0.18 = 60 pAIOFF_P_10/0.18 = -30 pAIOFF_N3.3_10/0.35 = 60 pAIOFF_P3.3_10/0.35 = -35 pA6. BVD_NVG=VS=VB=0V, VD = 1.8 To 3*VDDN, whereas, VDDN=1.8V or 3.3V, Measure BVD_N=VD ID=0.1uA

49、*WTypical Value:BVD_N_10/0.18 = 4VBVD_P_10/0.18 = -5.21VBVD_N3.3_10/0.35 = 7VBVD_P3.3_10/0.35 = -6.99VTest ParameterTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsibl

50、e for any reliance.7. ISUB_NVD=1.1*1.8V, VS=VB=0, VG = 0.2*1.8V to 1.1*1.8V, Find ISUB_N (MAX)(then, divided by W in some calculation)The substrate current in an n-channel MOSFET results from hole generation by impact ionizations induced by the channel electrons traveling from source to drain. Assum

51、ing impact ionization occurs uniformly in the pinch off region (near the drain), the substrate current, Ibs, may be written as Ibs=Id Lwhere = ionization coefficient L= length of pinch off regionWith Vg, Ibs , and reaches a miximum value, then decrease.The initial Ibs increase is due to the increase

52、 in Id with Vg. However, as Vg goes up, the lateral field decreases, causing a reduction in . Thus, the peak substrate current occurs when the two competing factors cancel out, usually at 0.5Vd.Typical Value:ISUB_N_10/0.18= ( 1.6 uA )ISUB_P_10/0.18 = ( -0.013 uA )Test ParameterTMThis document is str

53、ictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance. 8. DIBL (Drain Induced Barrier Lowering)VTLINVD=0.05V, VS=VB=0, VG = 0 to 0.8*VDDNMeasure VTLIN=VG ID = 0.1A*(W/L)VTSA

54、TVD=1.1*VDDN, VS=VB=0, VG = 0 to 0.8*VDDNMeasure VTSAT=VGID = 0.1A*(W/L)DIBL= (VTLIN-VTSAT) / (1.1*VDDN-0.05)Threshold variation is caused by the increased current with increased drain voltage, as the applied drain voltage controls the inversion layer charge at the drain, thereby competing with the

55、gate voltage. In the weak inversion regime, there is a potential barrier between the source and the channel region. The height of this barrier is a result of the balance between drift and diffusion current between these two regions. If a high drain voltage is applied, the barrier height can decrease

56、, leading to an increase drain current. Thus the drain current is controlled not only by gate voltage, but also by the drain voltage.Test ParameterTMThis document is strictly confidential and proprietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC sh

57、all not be liable or responsible for any reliance. 9. GAMMA_N ( : body effect) VD=0.05V, VS=0, VB=-1.5*1.8, VG=0 to 1.1*1.8 Measure VTLIN1_N = VG ID=0.1uA*(W/L) the threshold voltage with substrate bias ( VB) =0.443744GAMMA_N=ABS (VTLIN1_N-VTLIN_N) / ASB(VB)+2* 1/2-2* 1/2 Since, VT = GC-QB/Cox-2 B-Q

58、ox/Cox = VFB-2 B+ SQRT(-2 B+VB) Where: VFB= GC-Qox/Coxand =SQRT(2siqNB)/Cox VTLIN1=VFB-2 B+ SQRT(-2 B+VB)VTLIN = VFB-2 B+ SQRT(-2 B) =(VTLIN1-VTLIN)/SQRT(-2 B+VB)- SQRT(-2 B)Typical Value:GAMMA_N_10/10 = 0.5 V1/2GAMMA_P_10/10 = 0.57 V1/2Test ParameterTMThis document is strictly confidential and prop

59、rietary of SMIC. It must not be copied or used for anypurpose other than for reference only, and SMIC shall not be liable or responsible for any reliance.10. SWING_NVD=0.05V, VS=VB=0, VG = 0 to 1.8V, Measure VG1 ID = 10 nA *(W/L) VG2 ID = 0.1 nA * (W/L)SWING_N = 500* (VG1-VG2)In the week inversion (

60、or sub-threshold) regime, the transistor conducts a very small sub-threshold current, and the drain current depends exponentially on the gate-source voltage. To measure the sub-threshold slope, SS, when VD=0.05V, is defined as:Ileak1= 10nA*(W/L)Ileak2=0.1nA*(W/L)VG2 VG1SUBVTSLP=(slope)-1=(VG1-VG2 )/